if (a->rl) {
tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
}
+ src1 = gen_pm_adjust_address(ctx, src1);
tcg_gen_qemu_ld_tl(load_val, src1, ctx->mem_idx, mop);
if (a->aq) {
tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ);
TCGLabel *l2 = gen_new_label();
src1 = get_gpr(ctx, a->rs1, EXT_ZERO);
+ src1 = gen_pm_adjust_address(ctx, src1);
tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1);
/*
TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
+ src1 = gen_pm_adjust_address(ctx, src1);
func(dest, src1, src2, ctx->mem_idx, mop);
gen_set_gpr(ctx, a->rd, dest);
tcg_gen_addi_tl(temp, addr, a->imm);
addr = temp;
}
+ addr = gen_pm_adjust_address(ctx, addr);
tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], addr, ctx->mem_idx, MO_TEQ);
tcg_gen_addi_tl(temp, addr, a->imm);
addr = temp;
}
+ addr = gen_pm_adjust_address(ctx, addr);
tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, MO_TEQ);
tcg_gen_addi_tl(temp, addr, a->imm);
addr = temp;
}
+ addr = gen_pm_adjust_address(ctx, addr);
dest = cpu_fpr[a->rd];
tcg_gen_qemu_ld_i64(dest, addr, ctx->mem_idx, MO_TEUL);
tcg_gen_addi_tl(temp, addr, a->imm);
addr = temp;
}
+ addr = gen_pm_adjust_address(ctx, addr);
tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, MO_TEUL);
tcg_gen_addi_tl(temp, addr, a->imm);
addr = temp;
}
+ addr = gen_pm_adjust_address(ctx, addr);
tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, memop);
gen_set_gpr(ctx, a->rd, dest);
tcg_gen_addi_tl(temp, addr, a->imm);
addr = temp;
}
+ addr = gen_pm_adjust_address(ctx, addr);
tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop);
return true;
ctx->base.is_jmp = DISAS_NORETURN;
}
+/*
+ * Temp stub: generates address adjustment for PointerMasking
+ */
+static TCGv gen_pm_adjust_address(DisasContext *s, TCGv src)
+{
+ return src;
+}
+
#ifndef CONFIG_USER_ONLY
/* The states of mstatus_fs are:
* 0 = disabled, 1 = initial, 2 = clean, 3 = dirty