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Revert "Revert "drm/amdgpu/gmc11: enable AGP aperture""
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 31 Jan 2023 15:03:40 +0000 (10:03 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 3 Feb 2023 20:42:05 +0000 (15:42 -0500)
This reverts commit 1a65327a84db5b9081a51ccb1c562083f59bfcec.

This should be resolved so we can re-enable this. Also,
the AGP apeture was bring programmed to 0 on MMHUB 3.0.1
since agp_start and end were not being set.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

index fa42d19..7c06901 100644 (file)
@@ -151,10 +151,11 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
 {
        uint64_t value;
 
-       /* Disable AGP. */
+       /* Program the AGP BAR */
        WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);
+       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
+       WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
+
 
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
index 5e0018f..0a31a34 100644 (file)
@@ -673,6 +673,7 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
 
        amdgpu_gmc_vram_location(adev, &adev->gmc, base);
        amdgpu_gmc_gart_location(adev, mc);
+       amdgpu_gmc_agp_location(adev, mc);
 
        /* base offset of vram pages */
        if (amdgpu_sriov_vf(adev))
index ae9cd1a..923fc09 100644 (file)
@@ -177,10 +177,11 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
         * these regs, and they will be programed at host.
         * so skip programing these regs.
         */
-       /* Disable AGP. */
+       /* Program the AGP BAR */
        WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
+
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,
                     adev->gmc.vram_start >> 18);
index c30e40e..5158030 100644 (file)
@@ -162,10 +162,10 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
        uint64_t value;
        uint32_t tmp;
 
-       /* Disable AGP. */
+       /* Program the AGP BAR */
        WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
-       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
+       WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
 
        if (!amdgpu_sriov_vf(adev)) {
                /*