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i965/fs: Simplify gl_SampleMaskIn handling.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 14 May 2014 04:21:21 +0000 (21:21 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Mon, 19 May 2014 06:35:18 +0000 (23:35 -0700)
As far as I can tell, there's no point in allocating an extra register
and generating a MOV---we can just use the copy provided as part of our
thread payload directly.  It's already in the right format.

Of course, there are zero Piglit tests for this.  We don't actually ship
the extension (GL_ARB_gpu_shader5) that exposes this functionality
either.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
src/mesa/drivers/dri/i965/brw_fs.cpp
src/mesa/drivers/dri/i965/brw_fs.h
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp

index ac257d6..336b8e6 100644 (file)
@@ -1331,16 +1331,6 @@ fs_visitor::emit_sampleid_setup(ir_variable *ir)
    return reg;
 }
 
-fs_reg *
-fs_visitor::emit_samplemaskin_setup(ir_variable *ir)
-{
-   assert(brw->gen >= 7);
-   this->current_annotation = "compute gl_SampleMaskIn";
-   fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
-   emit(MOV(*reg, fs_reg(retype(brw_vec8_grf(c->sample_mask_in_reg, 0), BRW_REGISTER_TYPE_D))));
-   return reg;
-}
-
 fs_reg
 fs_visitor::fix_math_operand(fs_reg src)
 {
index 4c8ed72..dac2d8a 100644 (file)
@@ -397,7 +397,6 @@ public:
    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
    fs_reg *emit_samplepos_setup(ir_variable *ir);
    fs_reg *emit_sampleid_setup(ir_variable *ir);
-   fs_reg *emit_samplemaskin_setup(ir_variable *ir);
    fs_reg *emit_general_interpolation(ir_variable *ir);
    void emit_interpolation_setup_gen4();
    void emit_interpolation_setup_gen6();
index 307d07b..eff7629 100644 (file)
@@ -138,7 +138,9 @@ fs_visitor::visit(ir_variable *ir)
       } else if (ir->data.location == SYSTEM_VALUE_SAMPLE_ID) {
         reg = emit_sampleid_setup(ir);
       } else if (ir->data.location == SYSTEM_VALUE_SAMPLE_MASK_IN) {
-         reg = emit_samplemaskin_setup(ir);
+         assert(brw->gen >= 7);
+         reg = new(mem_ctx) fs_reg(retype(brw_vec8_grf(c->sample_mask_in_reg, 0),
+                                          BRW_REGISTER_TYPE_D));
       }
    }