#include "qemu/error-report.h"
#include "qemu/log.h"
#include "cpu.h"
-#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/m68k/mcf.h"
#include "qemu/timer.h"
if (mode == 2)
prescale *= 16;
- if (mode == 3 || mode == 0)
- hw_error("m5206_timer: mode %d not implemented\n", mode);
- if ((s->tmr & TMR_FRR) == 0)
- hw_error("m5206_timer: free running mode not implemented\n");
+ if (mode == 3 || mode == 0) {
+ qemu_log_mask(LOG_UNIMP, "m5206_timer: mode %d not implemented\n",
+ mode);
+ goto exit;
+ }
+ if ((s->tmr & TMR_FRR) == 0) {
+ qemu_log_mask(LOG_UNIMP,
+ "m5206_timer: free running mode not implemented\n");
+ goto exit;
+ }
/* Assume 66MHz system clock. */
ptimer_set_freq(s->timer, 66000000 / prescale);
m5206_mbar_state *s = (m5206_mbar_state *)opaque;
offset &= 0x3ff;
if (offset >= 0x200) {
- hw_error("Bad MBAR read offset 0x%x", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR read offset 0x%" HWADDR_PRIX,
+ offset);
+ return 0;
}
if (m5206_mbar_width[offset >> 2] > 1) {
uint16_t val;
int width;
offset &= 0x3ff;
if (offset >= 0x200) {
- hw_error("Bad MBAR read offset 0x%x", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR read offset 0x%" HWADDR_PRIX,
+ offset);
+ return 0;
}
width = m5206_mbar_width[offset >> 2];
if (width > 2) {
int width;
offset &= 0x3ff;
if (offset >= 0x200) {
- hw_error("Bad MBAR read offset 0x%x", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR read offset 0x%" HWADDR_PRIX,
+ offset);
+ return 0;
}
width = m5206_mbar_width[offset >> 2];
if (width < 4) {
int width;
offset &= 0x3ff;
if (offset >= 0x200) {
- hw_error("Bad MBAR write offset 0x%x", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR write offset 0x%" HWADDR_PRIX,
+ offset);
+ return;
}
width = m5206_mbar_width[offset >> 2];
if (width > 1) {
int width;
offset &= 0x3ff;
if (offset >= 0x200) {
- hw_error("Bad MBAR write offset 0x%x", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR write offset 0x%" HWADDR_PRIX,
+ offset);
+ return;
}
width = m5206_mbar_width[offset >> 2];
if (width > 2) {
int width;
offset &= 0x3ff;
if (offset >= 0x200) {
- hw_error("Bad MBAR write offset 0x%x", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR, "Bad MBAR write offset 0x%" HWADDR_PRIX,
+ offset);
+ return;
}
width = m5206_mbar_width[offset >> 2];
if (width < 4) {