drm/i915/display: Add HW state readout for VRR

This functions gets the VRR config from the VRR registers
to match the crtc state variables for VRR.

v2:
* Rebase (Manasi)
* Use HAS_VRR (Jani N)

v3:
* Get pipeline_full, flipline (Ville)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122232647.22688-14-manasi.d.navare@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8cee2b1..61ac6d6 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8981,6 +8981,9 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
                intel_get_transcoder_timings(crtc, pipe_config);
        }
 
+       if (HAS_VRR(dev_priv))
+               intel_vrr_get_config(crtc, pipe_config);
+
        intel_get_pipe_src_size(crtc, pipe_config);
 
        if (IS_HASWELL(dev_priv)) {

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 776b8c5..c712545 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -147,3 +147,23 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
        intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 0);
        intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0);
 }
+
+void intel_vrr_get_config(struct intel_crtc *crtc,
+                         struct intel_crtc_state *crtc_state)
+{
+       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+       u32 trans_vrr_ctl;
+
+       trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(cpu_transcoder));
+       crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE;
+       if (!crtc_state->vrr.enable)
+               return;
+
+       if (trans_vrr_ctl & VRR_CTL_PIPELINE_FULL_OVERRIDE)
+               crtc_state->vrr.pipeline_full = REG_FIELD_GET(VRR_CTL_PIPELINE_FULL_MASK, trans_vrr_ctl);
+       if (trans_vrr_ctl & VRR_CTL_FLIP_LINE_EN)
+               crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1;
+       crtc_state->vrr.vmax = intel_de_read(dev_priv, TRANS_VRR_VMAX(cpu_transcoder)) + 1;
+       crtc_state->vrr.vmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(cpu_transcoder)) + 1;
+}

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index a49faa0..8a2fe9c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -15,6 +15,7 @@ struct intel_crtc;
 struct intel_crtc_state;
 struct intel_dp;
 struct intel_encoder;
+struct intel_crtc;
 
 bool intel_vrr_is_capable(struct drm_connector *connector);
 void intel_vrr_check_modeset(struct intel_atomic_state *state);
@@ -24,5 +25,7 @@ void intel_vrr_enable(struct intel_encoder *encoder,
                      const struct intel_crtc_state *crtc_state);
 void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
 void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
+void intel_vrr_get_config(struct intel_crtc *crtc,
+                         struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_VRR_H__ */