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drm/amd/display: Fix prefetch bandwidth calculation for DCN3.1
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Wed, 29 Sep 2021 15:37:33 +0000 (11:37 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 20 Oct 2021 19:17:13 +0000 (15:17 -0400)
[Why]
Prefetch BW calculated is lower than the DML reference because of a
porting error that's excluding cursor and row bandwidth from the
pixel data bandwidth.

[How]
Change the dml_max4 to dml_max3 and include cursor and row bandwidth
in the same calculation as the rest of the pixel data during vactive.

Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

index ce55c9c..d58925c 100644 (file)
@@ -5398,9 +5398,9 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
 
                                        v->MaximumReadBandwidthWithPrefetch =
                                                        v->MaximumReadBandwidthWithPrefetch
-                                                                       + dml_max4(
-                                                                                       v->VActivePixelBandwidth[i][j][k],
-                                                                                       v->VActiveCursorBandwidth[i][j][k]
+                                                                       + dml_max3(
+                                                                                       v->VActivePixelBandwidth[i][j][k]
+                                                                                                       + v->VActiveCursorBandwidth[i][j][k]
                                                                                                        + v->NoOfDPP[i][j][k]
                                                                                                                        * (v->meta_row_bandwidth[i][j][k]
                                                                                                                                        + v->dpte_row_bandwidth[i][j][k]),