/*
Skelton for retropc emulator
- Author : Takeda.Toshiya
- Date : 2007.08.14 -
-
- [ uPD71071 ]
+ Author : Kyuma.Ohta <whatisthis.sowhat@gmail.com>
+ Date : 2023.04.29 -
+ History: 2023.04.29 Move from Takeda-San's UPD71071:: .
+ [ uPD71071 Artane. Variant]
*/
-#include "upd71071.h"
+#include "upd71071_art.h"
#include "debugger.h"
-void UPD71071::initialize()
+void UPD71071_ART::initialize()
{
DEVICE::initialize();
_SINGLE_MODE_DMA = osd->check_feature(_T("SINGLE_MODE_DMA"));
}
}
-void UPD71071::reset()
+void UPD71071_ART::reset()
{
for(int i = 0; i < 4; i++) {
dma[i].mode = 0x04;
reset_all_tc();
}
#if 0
-void UPD71071::write_io16(uint32_t addr, uint32_t data)
+void UPD71071_ART::write_io16(uint32_t addr, uint32_t data)
{
pair32_t _d, _bd;
// if(b16 != 0) {
}
#endif
-void UPD71071::write_io8(uint32_t addr, uint32_t data)
+void UPD71071_ART::write_io8(uint32_t addr, uint32_t data)
{
pair32_t _d;
uint8_t ad[4];
}
}
#if 0
-uint32_t UPD71071::read_io16(uint32_t addr)
+uint32_t UPD71071_ART::read_io16(uint32_t addr)
{
// if(b16 != 0) {
switch(addr & 0x0e) {
return read_io8(addr);
}
#endif
-uint32_t UPD71071::read_io8(uint32_t addr)
+uint32_t UPD71071_ART::read_io8(uint32_t addr)
{
uint32_t val;
pair32_t _d;
return 0xff;
}
-void UPD71071::write_signal(int id, uint32_t data, uint32_t _mask)
+void UPD71071_ART::write_signal(int id, uint32_t data, uint32_t _mask)
{
int ch = id & 3;
uint8_t bit = 1 << ch;
}
}
-uint32_t UPD71071::read_signal(int ch)
+uint32_t UPD71071_ART::read_signal(int ch)
{
if((ch >= (SIG_UPD71071_IS_TRANSFERING + 0)) && (ch < (SIG_UPD71071_IS_TRANSFERING + 4))) {
int _nch = ch - SIG_UPD71071_IS_TRANSFERING;
return 0;
}
-void UPD71071::write_via_debugger_data8w(uint32_t addr, uint32_t data, int *wait)
+void UPD71071_ART::write_via_debugger_data8w(uint32_t addr, uint32_t data, int *wait)
{
d_mem->write_dma_data8w(addr, data, wait);
}
-uint32_t UPD71071::read_via_debugger_data8w(uint32_t addr, int *wait)
+uint32_t UPD71071_ART::read_via_debugger_data8w(uint32_t addr, int *wait)
{
return d_mem->read_dma_data8w(addr, wait);
}
-void UPD71071::write_via_debugger_data16w(uint32_t addr, uint32_t data, int *wait)
+void UPD71071_ART::write_via_debugger_data16w(uint32_t addr, uint32_t data, int *wait)
{
d_mem->write_dma_data16w(addr, data, wait);
}
-uint32_t UPD71071::read_via_debugger_data16w(uint32_t addr, int *wait)
+uint32_t UPD71071_ART::read_via_debugger_data16w(uint32_t addr, int *wait)
{
return d_mem->read_dma_data16w(addr, wait);
}
// note: if SINGLE_MODE_DMA is defined, do_dma() is called in every machine cycle
-void UPD71071::do_dma_verify_8bit(int c, bool extended, bool compressed, int& wait)
+void UPD71071_ART::do_dma_verify_8bit(int c, bool extended, bool compressed, int& wait)
{
bool __debugging = false;
int wait_1 = 0, wait_2 = 0;
}
}
-void UPD71071::do_dma_dev_to_mem_8bit(int c, bool extended, bool compressed, int& wait)
+void UPD71071_ART::do_dma_dev_to_mem_8bit(int c, bool extended, bool compressed, int& wait)
{
reset_ube(c);
// io -> memory
}
}
-void UPD71071::do_dma_mem_to_dev_8bit(int c, bool extended, bool compressed, int& wait)
+void UPD71071_ART::do_dma_mem_to_dev_8bit(int c, bool extended, bool compressed, int& wait)
{
// memory -> io
bool __debugging = false;
}
}
-void UPD71071::do_dma_inc_dec_ptr_8bit(int c)
+void UPD71071_ART::do_dma_inc_dec_ptr_8bit(int c)
{
// Note: FM-Towns may extend to 32bit.
if(dma[c].mode & 0x20) {
}
}
-void UPD71071::do_dma_verify_16bit(int c, bool extended, bool compressed, int& wait)
+void UPD71071_ART::do_dma_verify_16bit(int c, bool extended, bool compressed, int& wait)
{
// verify
bool __debugging = false;
}
}
-void UPD71071::do_dma_dev_to_mem_16bit(int c, bool extended, bool compressed, int& wait)
+void UPD71071_ART::do_dma_dev_to_mem_16bit(int c, bool extended, bool compressed, int& wait)
{
// io -> memory
bool __debugging = false;
}
}
-void UPD71071::do_dma_mem_to_dev_16bit(int c, bool extended, bool compressed, int& wait)
+void UPD71071_ART::do_dma_mem_to_dev_16bit(int c, bool extended, bool compressed, int& wait)
{
// memory -> io
bool __debugging = false;
}
}
-void UPD71071::do_dma_inc_dec_ptr_16bit(int c)
+void UPD71071_ART::do_dma_inc_dec_ptr_16bit(int c)
{
// Note: FM-Towns may extend to 32bit.
if(dma[c].mode & 0x20) {
}
}
-bool UPD71071::do_dma_epilogue(int c)
+bool UPD71071_ART::do_dma_epilogue(int c)
{
c = c & 3;
uint8_t bit = 1 << c;
return false;
}
-bool UPD71071::do_dma_per_channel(int c)
+bool UPD71071_ART::do_dma_per_channel(int c)
{
reset_dma_ack(c);
uint8_t bit = 1 << c;
return false;
}
-bool UPD71071::do_dma_core(int c)
+bool UPD71071_ART::do_dma_core(int c)
{
if((cmd & 4) != 0) {
return true;
return false;
}
-void UPD71071::do_dma()
+void UPD71071_ART::do_dma()
{
// check DDMA
if(cmd & 4) {
//#endif
}
-bool UPD71071::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len)
+bool UPD71071_ART::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len)
{
/*
CH0 AREG=FFFF CREG=FFFF BAREG=FFFF BCREG=FFFF REQ=1 MASK=1 MODE=FF MEM->I/O
return true;
}
-#define STATE_VERSION 6
+#define STATE_VERSION 7
-bool UPD71071::process_state(FILEIO* state_fio, bool loading)
+bool UPD71071_ART::process_state(FILEIO* state_fio, bool loading)
{
if(!state_fio->StateCheckUint32(STATE_VERSION)) {
return false;
/*
Skelton for retropc emulator
- Author : Takeda.Toshiya
- Date : 2007.08.14 -
-
- [ uPD71071 ]
+ Author : Kyuma.Ohta <whatisthis.sowhat@gmail.com>
+ Date : 2023.04.29 -
+ History: 2023.04.29 Move from Takeda-San's UPD71071:: .
+ [ uPD71071 Artane. Variant]
*/
-#ifndef _UPD71071_H_
-#define _UPD71071_H_
+#ifndef _UPD71071_ART_H_
+#define _UPD71071_ART_H_
//#include "vm.h"
//#include "../emu.h"
#include "device.h"
+#ifndef SIG_UPD71071_CH0
#define SIG_UPD71071_CH0 0
#define SIG_UPD71071_CH1 1
#define SIG_UPD71071_CH2 2
#define SIG_UPD71071_CH3 3
+#endif
+
/* UBE: INDICATE TARGET DEVICE HAS 16bit capability YES=1 NO=0*/
#define SIG_UPD71071_UBE_CH0 4
#define SIG_UPD71071_UBE_CH1 5
#define SIG_UPD71071_BAREG 36 /* 36 - 39 */
class DEBUGGER;
-class DLL_PREFIX UPD71071 : public DEVICE
+class DLL_PREFIX UPD71071_ART : public DEVICE
{
protected:
DEVICE* d_cpu;
inline uint32_t __FASTCALL manipulate_a_byte_from_dword_le(uint32_t src, uint8_t pos, uint8_t data);
public:
- UPD71071(VM_TEMPLATE* parent_vm, EMU_TEMPLATE* parent_emu) : DEVICE(parent_vm, parent_emu)
+ UPD71071_ART(VM_TEMPLATE* parent_vm, EMU_TEMPLATE* parent_emu) : DEVICE(parent_vm, parent_emu)
{
// TIP: if((DEVICE::prev_device == NULL) || (DEVICE::this_device_id == 0)) DEVICE must be DUMMY.
// And, at this device, should not be FIRST DEVICE. 20170613 Ohta.
initialize_output_signals(&outputs_ube[i]);
initialize_output_signals(&outputs_ack[i]);
}
- set_device_name(_T("uPD71071 DMAC"));
+ set_device_name(_T("uPD71071 DMAC (Artane's variant)"));
}
- ~UPD71071() {}
+ ~UPD71071_ART() {}
// common functions
virtual void initialize() override;
}
};
-inline uint16_t UPD71071::manipulate_a_byte_from_word_le(uint16_t src, uint8_t pos, uint8_t data)
+inline uint16_t UPD71071_ART::manipulate_a_byte_from_word_le(uint16_t src, uint8_t pos, uint8_t data)
{
pair16_t n;
n.w = src;
return n.w;
}
-inline uint32_t UPD71071::manipulate_a_byte_from_dword_le(uint32_t src, uint8_t pos, uint8_t data)
+inline uint32_t UPD71071_ART::manipulate_a_byte_from_dword_le(uint32_t src, uint8_t pos, uint8_t data)
{
pair32_t n;
n.d = src;
return n.d;
}
-inline void UPD71071::reset_all_tc()
+inline void UPD71071_ART::reset_all_tc()
{
tc = 0;
for(int i = 0; i < 4; i++) {
}
}
-inline void UPD71071::reset_tc(int ch)
+inline void UPD71071_ART::reset_tc(int ch)
{
if((ch < 0) || (ch > 3)) return;
uint8_t bit = (1 << ch);
/*if(tc != tc_bak) */ write_signals(&(outputs_tc[ch]), 0);
}
-inline void UPD71071::set_tc(int ch)
+inline void UPD71071_ART::set_tc(int ch)
{
if((ch < 0) || (ch > 3)) return;
uint8_t bit = (1 << ch);
/*if(tc != tc_bak) */write_signals(&(outputs_tc[ch]), 0xffffffff);
}
-inline void UPD71071::set_ube(int ch)
+inline void UPD71071_ART::set_ube(int ch)
{
bool stat = inputs_ube[ch & 3];
stat &= dma[ch & 3].is_16bit;
}
}
-inline void UPD71071::reset_ube(int ch)
+inline void UPD71071_ART::reset_ube(int ch)
{
if(stats_ube[ch &3]) {
write_signals(&outputs_ube[ch & 3], 0x00000000);
}
}
-inline void UPD71071::set_dma_ack(int ch)
+inline void UPD71071_ART::set_dma_ack(int ch)
{
write_signals(&outputs_ack[ch & 3], 0xffffffff);
}
-inline void UPD71071::reset_dma_ack(int ch)
+inline void UPD71071_ART::reset_dma_ack(int ch)
{
write_signals(&outputs_ack[ch & 3], 0x00000000);
}