drm/sun4i: Initialize registers in tcon-top driver

It turns out that TCON TOP registers in H6 SoC have non-zero reset
value. This may cause issues if bits are not changed during
configuration.

To prevent that, initialize registers to 0.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-24-jernej.skrabec@siol.net

diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 3040a79..3715854 100644 (file)
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -168,6 +168,13 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
        }
 
        /*
+        * At least on H6, some registers have some bits set by default
+        * which may cause issues. Clear them here.
+        */
+       writel(0, regs + TCON_TOP_PORT_SEL_REG);
+       writel(0, regs + TCON_TOP_GATE_SRC_REG);
+
+       /*
         * TCON TOP has two muxes, which select parent clock for each TCON TV
         * channel clock. Parent could be either TCON TV or TVE clock. For now
         * we leave this fixed to TCON TV, since TVE driver for R40 is not yet