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MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB
author
Markos Chandras
<markos.chandras@imgtec.com>
Thu, 9 Jul 2015 09:40:50 +0000
(10:40 +0100)
committer
Ralf Baechle
<ralf@linux-mips.org>
Wed, 26 Aug 2015 13:23:17 +0000
(15:23 +0200)
We are so early in the boot process where we really don't want to
stall and wait for CP0 FTLB related changes become visible so just drop
the cp0 hazard barrier.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10649/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cpu-probe.c
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diff --git
a/arch/mips/kernel/cpu-probe.c
b/arch/mips/kernel/cpu-probe.c
index
02b7512
..
dc057f3
100644
(file)
--- a/
arch/mips/kernel/cpu-probe.c
+++ b/
arch/mips/kernel/cpu-probe.c
@@
-385,7
+385,6
@@
static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
else
/* Disable FTLB */
write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
- back_to_back_c0_hazard();
break;
}
}