Merge tag 'drm-misc-next-2022-03-03' of git://anongit.freedesktop.org/drm/drm-misc...

drm-misc-next for v5.18:

UAPI Changes:

Cross-subsystem Changes:
- Improve performance of some fbdev ops, in some cases up to 6x faster.

Core Changes:
- Some small DP fixes.
- Find panels in subnodes of OF devices, and add of_get_drm_panel_display_mode
  to retrieve mode.
- Add drm_object_property_get_default_value and use it for resetting
  zpos in plane state reset, removing the need for individual drivers
  to do it.
- Same for color encoding and color range props.
- Update panic handling todo doc.
- Add todo that format conversion helpers should be sped up similarly to fbdev ops.

Driver Changes:
- Add panel orientation property to simpledrm for quirked panels.
- Assorted small fixes to tiny/repaper, nouveau, stm, omap, ssd130x.
- Add crc support to stm/ltdc.
- Add MIPI DBI compatible SPI driver
- Assorted small fixes to tiny panels and bridge drivers.
- Add AST2600 support to aspeed.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/48fabd78-ade9-f80b-c724-13726c7be69e@linux.intel.com

diff --cc Documentation/gpu/todo.rst
Simple merge

diff --cc MAINTAINERS
Simple merge

diff --cc drivers/gpu/drm/bridge/nwl-dsi.c
Simple merge

diff --cc drivers/gpu/drm/dp/drm_dp.c
index e159b81,d2fb39f..703972a
--- 1/drivers/gpu/drm/dp/drm_dp.c
--- 2/drivers/gpu/drm/dp/drm_dp.c
+++ b/drivers/gpu/drm/dp/drm_dp.c
@@@ -145,79 -145,6 +145,69 @@@ u8 drm_dp_get_adjust_tx_ffe_preset(cons
  }
  EXPORT_SYMBOL(drm_dp_get_adjust_tx_ffe_preset);
  
- u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE],
-                                        unsigned int lane)
- {
-       unsigned int offset = DP_ADJUST_REQUEST_POST_CURSOR2;
-       u8 value = dp_link_status(link_status, offset);
- 
-       return (value >> (lane << 1)) & 0x3;
- }
- EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
- 
 +/* DP 2.0 errata for 128b/132b */
 +bool drm_dp_128b132b_lane_channel_eq_done(const u8 link_status[DP_LINK_STATUS_SIZE],
 +                                        int lane_count)
 +{
 +      u8 lane_align, lane_status;
 +      int lane;
 +
 +      lane_align = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);
 +      if (!(lane_align & DP_INTERLANE_ALIGN_DONE))
 +              return false;
 +
 +      for (lane = 0; lane < lane_count; lane++) {
 +              lane_status = dp_get_lane_status(link_status, lane);
 +              if (!(lane_status & DP_LANE_CHANNEL_EQ_DONE))
 +                      return false;
 +      }
 +      return true;
 +}
 +EXPORT_SYMBOL(drm_dp_128b132b_lane_channel_eq_done);
 +
 +/* DP 2.0 errata for 128b/132b */
 +bool drm_dp_128b132b_lane_symbol_locked(const u8 link_status[DP_LINK_STATUS_SIZE],
 +                                      int lane_count)
 +{
 +      u8 lane_status;
 +      int lane;
 +
 +      for (lane = 0; lane < lane_count; lane++) {
 +              lane_status = dp_get_lane_status(link_status, lane);
 +              if (!(lane_status & DP_LANE_SYMBOL_LOCKED))
 +                      return false;
 +      }
 +      return true;
 +}
 +EXPORT_SYMBOL(drm_dp_128b132b_lane_symbol_locked);
 +
 +/* DP 2.0 errata for 128b/132b */
 +bool drm_dp_128b132b_eq_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE])
 +{
 +      u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);
 +
 +      return status & DP_128B132B_DPRX_EQ_INTERLANE_ALIGN_DONE;
 +}
 +EXPORT_SYMBOL(drm_dp_128b132b_eq_interlane_align_done);
 +
 +/* DP 2.0 errata for 128b/132b */
 +bool drm_dp_128b132b_cds_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE])
 +{
 +      u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);
 +
 +      return status & DP_128B132B_DPRX_CDS_INTERLANE_ALIGN_DONE;
 +}
 +EXPORT_SYMBOL(drm_dp_128b132b_cds_interlane_align_done);
 +
 +/* DP 2.0 errata for 128b/132b */
 +bool drm_dp_128b132b_link_training_failed(const u8 link_status[DP_LINK_STATUS_SIZE])
 +{
 +      u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED);
 +
 +      return status & DP_128B132B_LT_FAILED;
 +}
 +EXPORT_SYMBOL(drm_dp_128b132b_link_training_failed);
 +
  static int __8b10b_clock_recovery_delay_us(const struct drm_dp_aux *aux, u8 rd_interval)
  {
        if (rd_interval > 4)

diff --cc drivers/gpu/drm/panel/panel-simple.c
Simple merge

diff --cc drivers/gpu/drm/rcar-du/rcar_du_plane.c
Simple merge

diff --cc drivers/gpu/drm/rcar-du/rcar_du_vsp.c
Simple merge

diff --cc drivers/gpu/drm/solomon/ssd130x.c
Simple merge

diff --cc include/drm/dp/drm_dp_helper.h
Simple merge