/// getOpcode - Returns the opcode of this MachineInstr.
///
- const int getOpcode() const;
+ int getOpcode() const;
/// Access to explicit operands of the instruction.
///
/// getOpcode - Returns the opcode of this MachineInstr.
///
-const int MachineInstr::getOpcode() const {
+int MachineInstr::getOpcode() const {
return TID->Opcode;
}
APInt
APFloat::convertDoubleAPFloatToAPInt() const {
- assert(semantics == (const llvm::fltSemantics* const)&IEEEdouble);
+ assert(semantics == (const llvm::fltSemantics*)&IEEEdouble);
assert (partCount()==1);
uint64_t myexponent, mysignificand;
APInt
APFloat::convertFloatAPFloatToAPInt() const {
- assert(semantics == (const llvm::fltSemantics* const)&IEEEsingle);
+ assert(semantics == (const llvm::fltSemantics*)&IEEEsingle);
assert (partCount()==1);
uint32_t myexponent, mysignificand;
// Execute!
if (envp != 0)
- execve (path.c_str(), (char** const)args, (char**)envp);
+ execve (path.c_str(), (char**)args, (char**)envp);
else
- execv (path.c_str(), (char** const)args);
+ execv (path.c_str(), (char**)args);
// If the execve() failed, we should exit and let the parent pick up
// our non-zero exit status.
exit (errno);
const std::vector<MVT::ValueType> &getValueTypes() const { return VTs; }
unsigned getNumValueTypes() const { return VTs.size(); }
- const MVT::ValueType getValueTypeNum(unsigned VTNum) const {
+ MVT::ValueType getValueTypeNum(unsigned VTNum) const {
if (VTNum < VTs.size())
return VTs[VTNum];
assert(0 && "VTNum greater than number of ValueTypes in RegClass!");