ARM: tegra: Add new PCIe regulator properties

These new properties more accurately reflect the real connections of the
boards and therefore make it easier to match them up with schematics.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index f45aad6..c800824 100644 (file)
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -562,9 +562,17 @@
        };
 
        pcie-controller@80003000 {
+               status = "okay";
+
+               avdd-pex-supply = <&pci_vdd_reg>;
+               vdd-pex-supply = <&pci_vdd_reg>;
+               avdd-pex-pll-supply = <&pci_vdd_reg>;
+               avdd-plle-supply = <&pci_vdd_reg>;
+               vddio-pex-clk-supply = <&pci_clk_reg>;
+
+               /* deprecated */
                pex-clk-supply = <&pci_clk_reg>;
                vdd-supply = <&pci_vdd_reg>;
-               status = "okay";
 
                pci@1,0 {
                        status = "okay";

diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index a1b0d96..0e33577 100644 (file)
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -473,6 +473,13 @@
        };
 
        pcie-controller@80003000 {
+               avdd-pex-supply = <&pci_vdd_reg>;
+               vdd-pex-supply = <&pci_vdd_reg>;
+               avdd-pex-pll-supply = <&pci_vdd_reg>;
+               avdd-plle-supply = <&pci_vdd_reg>;
+               vddio-pex-clk-supply = <&pci_clk_reg>;
+
+               /* deprecated */
                pex-clk-supply = <&pci_clk_reg>;
                vdd-supply = <&pci_vdd_reg>;
        };

diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 216fa6d..401b32e 100644 (file)
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -318,6 +318,14 @@
 
        pcie-controller@80003000 {
                status = "okay";
+
+               avdd-pex-supply = <&pci_vdd_reg>;
+               vdd-pex-supply = <&pci_vdd_reg>;
+               avdd-pex-pll-supply = <&pci_vdd_reg>;
+               avdd-plle-supply = <&pci_vdd_reg>;
+               vddio-pex-clk-supply = <&pci_clk_reg>;
+
+               /* deprecated */
                pex-clk-supply = <&pci_clk_reg>;
                vdd-supply = <&pci_vdd_reg>;
 

diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 3189791..d3ddfa0 100644 (file)
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -17,6 +17,17 @@
 
        pcie-controller@00003000 {
                status = "okay";
+
+               avdd-pexa-supply = <&ldo1_reg>;
+               vdd-pexa-supply = <&ldo1_reg>;
+               avdd-pexb-supply = <&ldo1_reg>;
+               vdd-pexb-supply = <&ldo1_reg>;
+               avdd-pex-pll-supply = <&ldo1_reg>;
+               avdd-plle-supply = <&ldo1_reg>;
+               vddio-pex-ctl-supply = <&sys_3v3_reg>;
+               hvdd-pex-supply = <&sys_3v3_pexs_reg>;
+
+               /* deprecated */
                pex-clk-supply = <&sys_3v3_pexs_reg>;
                vdd-supply = <&ldo1_reg>;
                avdd-supply = <&ldo2_reg>;

diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 0cf0848..636d62e 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -38,6 +38,16 @@
 
        pcie-controller@00003000 {
                status = "okay";
+
+               /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
+               avdd-pexb-supply = <&ldo1_reg>;
+               vdd-pexb-supply = <&ldo1_reg>;
+               avdd-pex-pll-supply = <&ldo1_reg>;
+               hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
+               vddio-pex-ctl-supply = <&sys_3v3_reg>;
+               avdd-plle-supply = <&ldo2_reg>;
+
+               /* deprecated */
                pex-clk-supply = <&pex_hvdd_3v3_reg>;
                vdd-supply = <&ldo1_reg>;
                avdd-supply = <&ldo2_reg>;