OP_WRITE,
OP_PCI_READ,
OP_PCI_WRITE,
+ OP_DISABLE_PCI,
OP_ADD_DMA_PATTERN,
OP_CLEAR_DMA_PATTERNS,
OP_CLOCK_STEP,
static GArray *dma_patterns;
static int dma_pattern_index;
+static bool pci_disabled;
/*
* Allocate a block of memory and populate it with a pattern.
uint8_t base;
uint8_t offset;
} a;
- if (len < sizeof(a) || fuzzable_pci_devices->len == 0) {
+ if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) {
return;
}
memcpy(&a, data, sizeof(a));
uint8_t offset;
uint32_t value;
} a;
- if (len < sizeof(a) || fuzzable_pci_devices->len == 0) {
+ if (len < sizeof(a) || fuzzable_pci_devices->len == 0 || pci_disabled) {
return;
}
memcpy(&a, data, sizeof(a));
qtest_clock_step_next(s);
}
+static void op_disable_pci(QTestState *s, const unsigned char *data, size_t len)
+{
+ pci_disabled = true;
+}
+
static void handle_timeout(int sig)
{
if (qtest_log_enabled) {
[OP_WRITE] = op_write,
[OP_PCI_READ] = op_pci_read,
[OP_PCI_WRITE] = op_pci_write,
+ [OP_DISABLE_PCI] = op_disable_pci,
[OP_ADD_DMA_PATTERN] = op_add_dma_pattern,
[OP_CLEAR_DMA_PATTERNS] = op_clear_dma_patterns,
[OP_CLOCK_STEP] = op_clock_step,
}
op_clear_dma_patterns(s, NULL, 0);
+ pci_disabled = false;
while (cmd && Size) {
/* Get the length until the next command or end of input */