}
};
-/* Perform a CFI query based on the bank width of the flash.
+/*
+ * Perform a CFI query based on the bank width of the flash.
* If this code is called we know we have a device_width set for
* this flash.
*/
uint32_t resp = 0;
hwaddr boff;
- /* Adjust incoming offset to match expected device-width
+ /*
+ * Adjust incoming offset to match expected device-width
* addressing. CFI query addresses are always specified in terms of
* the maximum supported width of the device. This means that x8
* devices and x8/x16 devices in x8 mode behave differently. For
if (boff >= sizeof(pfl->cfi_table)) {
return 0;
}
- /* Now we will construct the CFI response generated by a single
+ /*
+ * Now we will construct the CFI response generated by a single
* device, then replicate that for all devices that make up the
* bus. For wide parts used in x8 mode, CFI query responses
* are different than native byte-wide parts.
uint32_t resp;
hwaddr boff;
- /* Adjust incoming offset to match expected device-width
+ /*
+ * Adjust incoming offset to match expected device-width
* addressing. Device ID read addresses are always specified in
* terms of the maximum supported width of the device. This means
* that x8 devices and x8/x16 devices in x8 mode behave
boff = offset >> (ctz32(pfl->bank_width) +
ctz32(pfl->max_device_width) - ctz32(pfl->device_width));
- /* Mask off upper bits which may be used in to query block
+ /*
+ * Mask off upper bits which may be used in to query block
* or sector lock status at other addresses.
* Offsets 2/3 are block lock status, is not emulated.
*/
case 0x60: /* Block /un)lock */
case 0x70: /* Status Register */
case 0xe8: /* Write block */
- /* Status register read. Return status from each device in
+ /*
+ * Status register read. Return status from each device in
* bank.
*/
ret = pfl->status;
shift += pfl->device_width * 8;
}
} else if (!pfl->device_width && width > 2) {
- /* Handle 32 bit flash cases where device width is not
+ /*
+ * Handle 32 bit flash cases where device width is not
* set. (Existing behavior before device width added.)
*/
ret |= pfl->status << 16;
break;
}
} else {
- /* If we have a read larger than the bank_width, combine multiple
+ /*
+ * If we have a read larger than the bank_width, combine multiple
* manufacturer/device ID queries into a single response.
*/
int i;
ret = 0;
}
} else {
- /* If we have a read larger than the bank_width, combine multiple
+ /*
+ * If we have a read larger than the bank_width, combine multiple
* CFI queries into a single response.
*/
int i;
break;
case 0xe8:
- /* Mask writeblock size based on device width, or bank width if
+ /*
+ * Mask writeblock size based on device width, or bank width if
* device width not specified.
*/
/* FIXME check @offset, @width */
total_len = pfl->sector_len * pfl->nb_blocs;
- /* These are only used to expose the parameters of each device
+ /*
+ * These are only used to expose the parameters of each device
* in the cfi_table[].
*/
num_devices = pfl->device_width ? (pfl->bank_width / pfl->device_width) : 1;
}
}
- /* Default to devices being used at their maximum device width. This was
+ /*
+ * Default to devices being used at their maximum device width. This was
* assumed before the device_width support was added.
*/
if (!pfl->max_device_width) {
uint16_t unlock_addr1;
uint8_t cfi_table[0x4d];
QEMUTimer timer;
- /* The device replicates the flash memory across its memory space. Emulate
+ /*
+ * The device replicates the flash memory across its memory space. Emulate
* that by having a container (.mem) filled with an array of aliases
* (.mem_mappings) pointing to the flash memory (.orig_mem).
*/
pfl->cfi_table[0x28] = 0x02;
pfl->cfi_table[0x29] = 0x00;
/* Max number of bytes in multi-bytes write */
- /* XXX: disable buffered write as it's not supported */
- // pfl->cfi_table[0x2A] = 0x05;
+ /*
+ * XXX: disable buffered write as it's not supported
+ * pfl->cfi_table[0x2A] = 0x05;
+ */
pfl->cfi_table[0x2A] = 0x00;
pfl->cfi_table[0x2B] = 0x00;
/* Number of erase block regions */