phy: qcom-qmp-combo: drop unused in-layout configuration

The QMP combo PHY driver does not use the "in-layout" configuration
macro to configure registers that are typically accessed using
"regs_layout" arrays (e.g. QPHY_START_CTRL) so drop this unused
feature.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221012081241.18273-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 3889dcf..8438085 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -70,11 +70,6 @@ struct qmp_phy_init_tbl {
        unsigned int offset;
        unsigned int val;
        /*
-        * register part of layout ?
-        * if yes, then offset gives index in the reg-layout
-        */
-       bool in_layout;
-       /*
         * mask of lanes for which this register is written
         * for cases when second lane needs different values
         */
@@ -88,14 +83,6 @@ struct qmp_phy_init_tbl {
                .lane_mask = 0xff,      \
        }
 
-#define QMP_PHY_INIT_CFG_L(o, v)       \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .in_layout = true,      \
-               .lane_mask = 0xff,      \
-       }
-
 #define QMP_PHY_INIT_CFG_LANE(o, v, l) \
        {                               \
                .offset = o,            \
@@ -1346,7 +1333,6 @@ static const struct qmp_phy_combo_cfg sm8250_usb3dpphy_cfg = {
 };
 
 static void qmp_combo_configure_lane(void __iomem *base,
-                                       const unsigned int *regs,
                                        const struct qmp_phy_init_tbl tbl[],
                                        int num,
                                        u8 lane_mask)
@@ -1361,19 +1347,15 @@ static void qmp_combo_configure_lane(void __iomem *base,
                if (!(t->lane_mask & lane_mask))
                        continue;
 
-               if (t->in_layout)
-                       writel(t->val, base + regs[t->offset]);
-               else
-                       writel(t->val, base + t->offset);
+               writel(t->val, base + t->offset);
        }
 }
 
 static void qmp_combo_configure(void __iomem *base,
-                                  const unsigned int *regs,
                                   const struct qmp_phy_init_tbl tbl[],
                                   int num)
 {
-       qmp_combo_configure_lane(base, regs, tbl, num, 0xff);
+       qmp_combo_configure_lane(base, tbl, num, 0xff);
 }
 
 static int qmp_combo_serdes_init(struct qmp_phy *qphy)
@@ -1384,28 +1366,24 @@ static int qmp_combo_serdes_init(struct qmp_phy *qphy)
        const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl;
        int serdes_tbl_num = cfg->serdes_tbl_num;
 
-       qmp_combo_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
+       qmp_combo_configure(serdes, serdes_tbl, serdes_tbl_num);
 
        if (cfg->type == PHY_TYPE_DP) {
                switch (dp_opts->link_rate) {
                case 1620:
-                       qmp_combo_configure(serdes, cfg->regs,
-                                              cfg->serdes_tbl_rbr,
+                       qmp_combo_configure(serdes, cfg->serdes_tbl_rbr,
                                               cfg->serdes_tbl_rbr_num);
                        break;
                case 2700:
-                       qmp_combo_configure(serdes, cfg->regs,
-                                              cfg->serdes_tbl_hbr,
+                       qmp_combo_configure(serdes, cfg->serdes_tbl_hbr,
                                               cfg->serdes_tbl_hbr_num);
                        break;
                case 5400:
-                       qmp_combo_configure(serdes, cfg->regs,
-                                              cfg->serdes_tbl_hbr2,
+                       qmp_combo_configure(serdes, cfg->serdes_tbl_hbr2,
                                               cfg->serdes_tbl_hbr2_num);
                        break;
                case 8100:
-                       qmp_combo_configure(serdes, cfg->regs,
-                                              cfg->serdes_tbl_hbr3,
+                       qmp_combo_configure(serdes, cfg->serdes_tbl_hbr3,
                                               cfg->serdes_tbl_hbr3_num);
                        break;
                default:
@@ -2069,29 +2047,25 @@ static int qmp_combo_power_on(struct phy *phy)
        }
 
        /* Tx, Rx, and PCS configurations */
-       qmp_combo_configure_lane(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 1);
+       qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
 
-       if (cfg->lanes >= 2) {
-               qmp_combo_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl,
-                                        cfg->tx_tbl_num, 2);
-       }
+       if (cfg->lanes >= 2)
+               qmp_combo_configure_lane(qphy->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2);
 
        /* Configure special DP tx tunings */
        if (cfg->type == PHY_TYPE_DP)
                cfg->configure_dp_tx(qphy);
 
-       qmp_combo_configure_lane(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 1);
+       qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
 
-       if (cfg->lanes >= 2) {
-               qmp_combo_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl,
-                                        cfg->rx_tbl_num, 2);
-       }
+       if (cfg->lanes >= 2)
+               qmp_combo_configure_lane(qphy->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2);
 
        /* Configure link rate, swing, etc. */
        if (cfg->type == PHY_TYPE_DP)
                cfg->configure_dp_phy(qphy);
        else
-               qmp_combo_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+               qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 
        if (cfg->has_pwrdn_delay)
                usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);