drm/amd/display: fix mpcc idle wait

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
index 246b60a..036f161 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
@@ -71,7 +71,7 @@ static void mpc10_assert_idle_mpcc(struct mpc *mpc, int id)
 
        ASSERT(!(mpc10->mpcc_in_use_mask & 1 << id));
        REG_WAIT(MPCC_STATUS[id],
-                       MPCC_BUSY, 0,
+                       MPCC_IDLE, 1,
                        1000, 1000);
 }