ARM: dts: ls1021a: Add memory controller

The LS1021A has a memory controller that supports EDAC. This commit
adds an entry for it.

Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index ed09412..6df6a29 100644 (file)
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -125,6 +125,13 @@
                interrupt-parent = <&gic>;
                ranges;
 
+               ddr: memory-controller@1080000 {
+                       compatible = "fsl,qoriq-memory-controller";
+                       reg = <0x0 0x1080000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+                       big-endian;
+               };
+
                gic: interrupt-controller@1400000 {
                        compatible = "arm,gic-400", "arm,cortex-a7-gic";
                        #interrupt-cells = <3>;