Merge branches 'edac-drivers', 'edac-amd64' and 'edac-misc' into edac-updates

Combine all queued EDAC changes for submission into v6.4:

* ras/edac-drivers:
  EDAC/i10nm: Add Intel Sierra Forest server support
  EDAC/skx: Fix overflows on the DRAM row address mapping arrays

* ras/edac-amd64: (27 commits)
  EDAC/amd64: Fix indentation in umc_determine_edac_cap()
  EDAC/amd64: Add get_err_info() to pvt->ops
  EDAC/amd64: Split dump_misc_regs() into dct/umc functions
  EDAC/amd64: Split init_csrows() into dct/umc functions
  EDAC/amd64: Split determine_edac_cap() into dct/umc functions
  EDAC/amd64: Rename f17h_determine_edac_ctl_cap()
  EDAC/amd64: Split setup_mci_misc_attrs() into dct/umc functions
  EDAC/amd64: Split ecc_enabled() into dct/umc functions
  EDAC/amd64: Split read_mc_regs() into dct/umc functions
  EDAC/amd64: Split determine_memory_type() into dct/umc functions
  EDAC/amd64: Split read_base_mask() into dct/umc functions
  EDAC/amd64: Split prep_chip_selects() into dct/umc functions
  EDAC/amd64: Rework hw_info_{get,put}
  EDAC/amd64: Merge struct amd64_family_type into struct amd64_pvt
  EDAC/amd64: Do not discover ECC symbol size for Family 17h and later
  EDAC/amd64: Drop dbam_to_cs() for Family 17h and later
  EDAC/amd64: Split get_csrow_nr_pages() into dct/umc functions
  EDAC/amd64: Rename debug_display_dimm_sizes()

* ras/edac-misc:
  EDAC/altera: Remove MODULE_LICENSE in non-module
  EDAC: Sanitize MODULE_AUTHOR strings
  EDAC/amd81[13]1: Remove trailing newline from MODULE_AUTHOR
  EDAC/i5100: Fix typo in comment
  EDAC/altera: Remove redundant error logging

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>

diff --cc drivers/edac/amd64_edac.c
index 5b42533,b551294,8b16ebf..5c4292e
--- 1/drivers/edac/amd64_edac.c
--- 2/drivers/edac/amd64_edac.c
--- 3/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@@@ -3408,13 -3219,30 -3408,13 +3219,30 @@@@ static u32 dct_get_csrow_nr_pages(struc
        nr_pages <<= 20 - PAGE_SHIFT;
   
        edac_dbg(0, "csrow: %d, channel: %d, DBAM idx: %d\n",
- -                 csrow_nr_orig, dct,  cs_mode);
+ +                 csrow_nr, dct,  cs_mode);
  +     edac_dbg(0, "nr_pages/channel: %u\n", nr_pages);
  +
  +     return nr_pages;
  +}
  +
-  static int init_csrows_df(struct mem_ctl_info *mci)
+ +static u32 umc_get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr_orig)
+ +{
+ +     int csrow_nr = csrow_nr_orig;
+ +     u32 cs_mode, nr_pages;
+ +
+ +     cs_mode = umc_get_cs_mode(csrow_nr >> 1, dct, pvt);
+ +
+ +     nr_pages   = umc_addr_mask_to_cs_size(pvt, dct, cs_mode, csrow_nr);
+ +     nr_pages <<= 20 - PAGE_SHIFT;
+ +
+ +     edac_dbg(0, "csrow: %d, channel: %d, cs_mode %d\n",
+ +              csrow_nr_orig, dct,  cs_mode);
+       edac_dbg(0, "nr_pages/channel: %u\n", nr_pages);
+  
+       return nr_pages;
+  }
+  
  -static int init_csrows_df(struct mem_ctl_info *mci)
+ +static void umc_init_csrows(struct mem_ctl_info *mci)
   {
        struct amd64_pvt *pvt = mci->pvt_info;
        enum edac_type edac_mode = EDAC_NONE;