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docs: ras: get rid of some warnings
authorMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Tue, 14 Apr 2020 16:48:41 +0000 (18:48 +0200)
committerJonathan Corbet <corbet@lwn.net>
Mon, 20 Apr 2020 21:45:23 +0000 (15:45 -0600)
Sphinx produce some warnings due to a bad table format:

    Documentation/admin-guide/ras.rst:358: WARNING: Definition list ends without a blank line; unexpected unindent.
    Documentation/admin-guide/ras.rst:358: WARNING: Definition list ends without a blank line; unexpected unindent.
    Documentation/admin-guide/ras.rst:363: WARNING: Definition list ends without a blank line; unexpected unindent.
    Documentation/admin-guide/ras.rst:363: WARNING: Definition list ends without a blank line; unexpected unindent.

Rearrange the things there in order to supress the warnings
while being precise at the Sphinx output about how ranks are
mapped into csrows.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/9e1bb44d6dbedb5b6f049d081b47da1f9620de16.1586881715.git.mchehab+huawei@kernel.org
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Documentation/admin-guide/ras.rst

index 0310db6..22b31bc 100644 (file)
@@ -351,15 +351,17 @@ controllers. The following example will assume 2 channels:
        +------------+-----------+-----------+
        |            |  ``ch0``  |  ``ch1``  |
        +============+===========+===========+
-       | ``csrow0`` |  DIMM_A0  |  DIMM_B0  |
-       |            |   rank0   |   rank0   |
-       +------------+     -     |     -     |
+       |            |**DIMM_A0**|**DIMM_B0**|
+       +------------+-----------+-----------+
+       | ``csrow0`` |   rank0   |   rank0   |
+       +------------+-----------+-----------+
        | ``csrow1`` |   rank1   |   rank1   |
        +------------+-----------+-----------+
-       | ``csrow2`` |  DIMM_A1  | DIMM_B1   |
-       |            |   rank0   |   rank0   |
-       +------------+     -     |     -     |
-       | ``csrow3`` |   rank1   |   rank1   |
+       |            |**DIMM_A1**|**DIMM_B1**|
+       +------------+-----------+-----------+
+       | ``csrow2`` |    rank0  |  rank0    |
+       +------------+-----------+-----------+
+       | ``csrow3`` |    rank1  |  rank1    |
        +------------+-----------+-----------+
 
 In the above example, there are 4 physical slots on the motherboard