pinctrl: renesas: r8a77950: Share QSPI pin group data

Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.

This reduces kernel size by 32 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d9de5b50bbad0c7b22f08d241a23c25e487c102.1640269757.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-r8a77950.c b/drivers/pinctrl/renesas/pfc-r8a77950.c
index ea10dfe..b6646e7 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a77950.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77950.c
@@ -3140,18 +3140,11 @@ static const unsigned int qspi0_ctrl_pins[] = {
 static const unsigned int qspi0_ctrl_mux[] = {
        QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
 };
-static const unsigned int qspi0_data2_pins[] = {
-       /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
-       PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
-};
-static const unsigned int qspi0_data2_mux[] = {
-       QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-};
-static const unsigned int qspi0_data4_pins[] = {
+static const unsigned int qspi0_data_pins[] = {
        /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
        PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, PIN_QSPI0_IO2, PIN_QSPI0_IO3,
 };
-static const unsigned int qspi0_data4_mux[] = {
+static const unsigned int qspi0_data_mux[] = {
        QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
        QSPI0_IO2_MARK, QSPI0_IO3_MARK,
 };
@@ -3163,18 +3156,11 @@ static const unsigned int qspi1_ctrl_pins[] = {
 static const unsigned int qspi1_ctrl_mux[] = {
        QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
 };
-static const unsigned int qspi1_data2_pins[] = {
-       /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
-       PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
-};
-static const unsigned int qspi1_data2_mux[] = {
-       QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-};
-static const unsigned int qspi1_data4_pins[] = {
+static const unsigned int qspi1_data_pins[] = {
        /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
        PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, PIN_QSPI1_IO2, PIN_QSPI1_IO3,
 };
-static const unsigned int qspi1_data4_mux[] = {
+static const unsigned int qspi1_data_mux[] = {
        QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
        QSPI1_IO2_MARK, QSPI1_IO3_MARK,
 };
@@ -4103,11 +4089,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(pwm6_a),
        SH_PFC_PIN_GROUP(pwm6_b),
        SH_PFC_PIN_GROUP(qspi0_ctrl),
-       SH_PFC_PIN_GROUP(qspi0_data2),
-       SH_PFC_PIN_GROUP(qspi0_data4),
+       BUS_DATA_PIN_GROUP(qspi0_data, 2),
+       BUS_DATA_PIN_GROUP(qspi0_data, 4),
        SH_PFC_PIN_GROUP(qspi1_ctrl),
-       SH_PFC_PIN_GROUP(qspi1_data2),
-       SH_PFC_PIN_GROUP(qspi1_data4),
+       BUS_DATA_PIN_GROUP(qspi1_data, 2),
+       BUS_DATA_PIN_GROUP(qspi1_data, 4),
        SH_PFC_PIN_GROUP(sata0_devslp_a),
        SH_PFC_PIN_GROUP(sata0_devslp_b),
        SH_PFC_PIN_GROUP(scif0_data),