-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instsimplify -S | FileCheck %s
target datalayout = "p:32:32"
; CHECK: ret i1 false
}
-define i1 @shl2(i32 %X) {
-; CHECK: @shl2
- %sub = shl nsw i32 -1, %X
- %cmp = icmp eq i32 %sub, 31
- ret i1 %cmp
-; CHECK-NEXT: ret i1 false
-}
-
define i1 @shl3(i32 %X) {
; CHECK: @shl3
%sub = shl nuw i32 4, %X
; CHECK-NEXT: ret i1 false
}
-define i1 @shl4(i32 %X) {
-; CHECK: @shl4
- %sub = shl nsw i32 -1, %X
- %cmp = icmp sle i32 %sub, -1
- ret i1 %cmp
-; CHECK-NEXT: ret i1 true
-}
-
-define i1 @shl5(i32 %X) {
-; CHECK: @shl5
- %sub = shl nuw i32 4, %X
- %cmp = icmp ugt i32 %sub, 3
- ret i1 %cmp
-; CHECK-NEXT: ret i1 true
-}
-
define i1 @lshr1(i32 %x) {
; CHECK-LABEL: @lshr1(
%s = lshr i32 -1, %x
; CHECK: ret i1 false
}
-define i1 @lshr2(i32 %x) {
-; CHECK-LABEL: @lshr2(
- %s = lshr i32 %x, 30
- %c = icmp ugt i32 %s, 8
- ret i1 %c
-; CHECK: ret i1 false
-}
-
define i1 @lshr3(i32 %x) {
; CHECK-LABEL: @lshr3(
%s = lshr i32 %x, %x
; CHECK: ret i1 false
}
-define i1 @ashr2(i32 %x) {
-; CHECK-LABEL: @ashr2(
- %s = ashr i32 %x, 30
- %c = icmp slt i32 %s, -5
- ret i1 %c
-; CHECK: ret i1 false
-}
-
define i1 @ashr3(i32 %x) {
; CHECK-LABEL: @ashr3(
%s = ashr i32 %x, %x
; CHECK: ret i1 false
}
-define i1 @urem3(i32 %X) {
-; CHECK-LABEL: @urem3(
- %A = urem i32 %X, 10
- %B = icmp ult i32 %A, 15
- ret i1 %B
-; CHECK: ret i1 true
-}
-
define i1 @urem4(i32 %X) {
; CHECK-LABEL: @urem4(
%A = urem i32 %X, 15
; CHECK-NOT: ret i1 false
}
-define i1 @srem1(i32 %X) {
-; CHECK-LABEL: @srem1(
- %A = srem i32 %X, -5
- %B = icmp sgt i32 %A, 5
- ret i1 %B
-; CHECK: ret i1 false
-}
-
; PR9343 #15
; CHECK-LABEL: @srem2(
; CHECK: ret i1 false
ret i1 %E
}
-define i1 @udiv1(i32 %X) {
-; CHECK-LABEL: @udiv1(
- %A = udiv i32 %X, 1000000
- %B = icmp ult i32 %A, 5000
- ret i1 %B
-; CHECK: ret i1 true
-}
-
define i1 @udiv2(i32 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @udiv2(
%A = udiv exact i32 10, %Z
; CHECK: ret i1 true
}
-define i1 @udiv5(i32 %X) {
-; CHECK-LABEL: @udiv5(
- %A = udiv i32 123, %X
- %C = icmp ugt i32 %A, 124
- ret i1 %C
-; CHECK: ret i1 false
-}
-
; PR11340
define i1 @udiv6(i32 %X) nounwind {
; CHECK-LABEL: @udiv6(
; CHECK: ret i1 %C
}
-
-define i1 @sdiv1(i32 %X) {
-; CHECK-LABEL: @sdiv1(
- %A = sdiv i32 %X, 1000000
- %B = icmp slt i32 %A, 3000
- ret i1 %B
-; CHECK: ret i1 true
-}
-
-define i1 @or1(i32 %X) {
-; CHECK-LABEL: @or1(
- %A = or i32 %X, 62
- %B = icmp ult i32 %A, 50
- ret i1 %B
-; CHECK: ret i1 false
-}
-
-define i1 @and1(i32 %X) {
-; CHECK-LABEL: @and1(
- %A = and i32 %X, 62
- %B = icmp ugt i32 %A, 70
- ret i1 %B
-; CHECK: ret i1 false
-}
-
define i1 @mul1(i32 %X) {
; CHECK-LABEL: @mul1(
; Square of a non-zero number is non-zero if there is no overflow.
; CHECK-NEXT: ret i1 true
}
-define i1 @compare_dividend(i32 %a) {
- %div = sdiv i32 2, %a
- %cmp = icmp eq i32 %div, 3
- ret i1 %cmp
-
-; CHECK-LABEL: @compare_dividend
-; CHECK-NEXT: ret i1 false
-}
-
define i1 @lshr_ugt_false(i32 %a) {
%shr = lshr i32 1, %a
%cmp = icmp ugt i32 %shr, 1
; CHECK-NEXT: ret i1 false
}
-define i1 @exact_lshr_ugt_false(i32 %a) {
- %shr = lshr exact i32 30, %a
- %cmp = icmp ult i32 %shr, 15
- ret i1 %cmp
-; CHECK-LABEL: @exact_lshr_ugt_false
-; CHECK-NEXT: ret i1 false
-}
-
-define i1 @lshr_sgt_false(i32 %a) {
- %shr = lshr i32 1, %a
- %cmp = icmp sgt i32 %shr, 1
- ret i1 %cmp
-; CHECK-LABEL: @lshr_sgt_false
-; CHECK-NEXT: ret i1 false
-}
-
-define i1 @ashr_sgt_false(i32 %a) {
- %shr = ashr i32 -30, %a
- %cmp = icmp sgt i32 %shr, -1
- ret i1 %cmp
-; CHECK-LABEL: @ashr_sgt_false
-; CHECK-NEXT: ret i1 false
-}
-
-define i1 @exact_ashr_sgt_false(i32 %a) {
- %shr = ashr exact i32 -30, %a
- %cmp = icmp sgt i32 %shr, -15
- ret i1 %cmp
-; CHECK-LABEL: @exact_ashr_sgt_false
-; CHECK-NEXT: ret i1 false
-}
-
define i1 @nonnull_arg(i32* nonnull %i) {
%cmp = icmp eq i32* %i, null
ret i1 %cmp
; CHECK-NEXT: ret i1 true
}
-define i1 @icmp_shl_nsw_neg1(i64 %a) {
- %shl = shl nsw i64 -1, %a
- %cmp = icmp sge i64 %shl, 3
- ret i1 %cmp
-
-; CHECK-LABEL: @icmp_shl_nsw_neg1
-; CHECK-NEXT: ret i1 false
-}
-
-define i1 @icmp_shl_nsw_1(i64 %a) {
- %shl = shl nsw i64 1, %a
- %cmp = icmp sge i64 %shl, 0
- ret i1 %cmp
-
-; CHECK-LABEL: @icmp_shl_nsw_1
-; CHECK-NEXT: ret i1 true
-}
-
define i1 @icmp_shl_1_V_ugt_2147483648(i32 %V) {
%shl = shl i32 1, %V
%cmp = icmp ugt i32 %shl, 2147483648
; CHECK: ret i1 false
}
-define i1 @tautological9(i32 %x) {
- %add = add nuw i32 %x, 13
- %cmp = icmp ne i32 %add, 12
- ret i1 %cmp
-; CHECK-LABEL: @tautological9(
-; CHECK: ret i1 true
-}
-
declare void @helper_i1(i1)
; Series of tests for icmp s[lt|ge] (or A, B), A and icmp s[gt|le] A, (or A, B)
define void @icmp_slt_sge_or(i32 %Ax, i32 %Bx) {
--- /dev/null
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instsimplify -S | FileCheck %s
+
+; Fold icmp with a constant operand.
+
+define i1 @tautological_ule(i8 %x) {
+; CHECK-LABEL: @tautological_ule(
+; CHECK-NEXT: ret i1 true
+;
+ %cmp = icmp ule i8 %x, 255
+ ret i1 %cmp
+}
+
+define i1 @tautological_ugt(i8 %x) {
+; CHECK-LABEL: @tautological_ugt(
+; CHECK-NEXT: ret i1 false
+;
+ %cmp = icmp ugt i8 %x, 255
+ ret i1 %cmp
+}
+
+; 'urem x, C2' produces [0, C2)
+define i1 @urem3(i32 %X) {
+; CHECK-LABEL: @urem3(
+; CHECK-NEXT: ret i1 true
+;
+ %A = urem i32 %X, 10
+ %B = icmp ult i32 %A, 15
+ ret i1 %B
+}
+
+;'srem x, C2' produces (-|C2|, |C2|)
+define i1 @srem1(i32 %X) {
+; CHECK-LABEL: @srem1(
+; CHECK-NEXT: ret i1 false
+;
+ %A = srem i32 %X, -5
+ %B = icmp sgt i32 %A, 5
+ ret i1 %B
+}
+
+;'udiv C2, x' produces [0, C2]
+define i1 @udiv5(i32 %X) {
+; CHECK-LABEL: @udiv5(
+; CHECK-NEXT: ret i1 false
+;
+ %A = udiv i32 123, %X
+ %C = icmp ugt i32 %A, 124
+ ret i1 %C
+}
+
+; 'udiv x, C2' produces [0, UINT_MAX / C2]
+define i1 @udiv1(i32 %X) {
+; CHECK-LABEL: @udiv1(
+; CHECK-NEXT: ret i1 true
+;
+ %A = udiv i32 %X, 1000000
+ %B = icmp ult i32 %A, 5000
+ ret i1 %B
+}
+
+; 'sdiv C2, x' produces [-|C2|, |C2|]
+define i1 @compare_dividend(i32 %a) {
+; CHECK-LABEL: @compare_dividend(
+; CHECK-NEXT: ret i1 false
+;
+ %div = sdiv i32 2, %a
+ %cmp = icmp eq i32 %div, 3
+ ret i1 %cmp
+}
+
+; 'sdiv x, C2' produces [INT_MIN / C2, INT_MAX / C2]
+; where C2 != -1 and C2 != 0 and C2 != 1
+define i1 @sdiv1(i32 %X) {
+; CHECK-LABEL: @sdiv1(
+; CHECK-NEXT: ret i1 true
+;
+ %A = sdiv i32 %X, 1000000
+ %B = icmp slt i32 %A, 3000
+ ret i1 %B
+}
+
+; 'shl nuw C2, x' produces [C2, C2 << CLZ(C2)]
+define i1 @shl5(i32 %X) {
+; CHECK-LABEL: @shl5(
+; CHECK-NEXT: ret i1 true
+;
+ %sub = shl nuw i32 4, %X
+ %cmp = icmp ugt i32 %sub, 3
+ ret i1 %cmp
+}
+
+; 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2]
+define i1 @shl2(i32 %X) {
+; CHECK-LABEL: @shl2(
+; CHECK-NEXT: ret i1 false
+;
+ %sub = shl nsw i32 -1, %X
+ %cmp = icmp eq i32 %sub, 31
+ ret i1 %cmp
+}
+
+; 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2]
+define i1 @shl4(i32 %X) {
+; CHECK-LABEL: @shl4(
+; CHECK-NEXT: ret i1 true
+;
+ %sub = shl nsw i32 -1, %X
+ %cmp = icmp sle i32 %sub, -1
+ ret i1 %cmp
+}
+
+; 'shl nsw C2, x' produces [C2, C2 << CLZ(C2)-1]
+define i1 @icmp_shl_nsw_1(i64 %a) {
+; CHECK-LABEL: @icmp_shl_nsw_1(
+; CHECK-NEXT: ret i1 true
+;
+ %shl = shl nsw i64 1, %a
+ %cmp = icmp sge i64 %shl, 0
+ ret i1 %cmp
+}
+
+; 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2]
+define i1 @icmp_shl_nsw_neg1(i64 %a) {
+; CHECK-LABEL: @icmp_shl_nsw_neg1(
+; CHECK-NEXT: ret i1 false
+;
+ %shl = shl nsw i64 -1, %a
+ %cmp = icmp sge i64 %shl, 3
+ ret i1 %cmp
+}
+
+; 'lshr x, C2' produces [0, UINT_MAX >> C2]
+define i1 @lshr2(i32 %x) {
+; CHECK-LABEL: @lshr2(
+; CHECK-NEXT: ret i1 false
+;
+ %s = lshr i32 %x, 30
+ %c = icmp ugt i32 %s, 8
+ ret i1 %c
+}
+
+; 'lshr C2, x' produces [C2 >> (Width-1), C2]
+define i1 @exact_lshr_ugt_false(i32 %a) {
+; CHECK-LABEL: @exact_lshr_ugt_false(
+; CHECK-NEXT: ret i1 false
+;
+ %shr = lshr exact i32 30, %a
+ %cmp = icmp ult i32 %shr, 15
+ ret i1 %cmp
+}
+
+; 'lshr C2, x' produces [C2 >> (Width-1), C2]
+define i1 @lshr_sgt_false(i32 %a) {
+; CHECK-LABEL: @lshr_sgt_false(
+; CHECK-NEXT: ret i1 false
+;
+ %shr = lshr i32 1, %a
+ %cmp = icmp sgt i32 %shr, 1
+ ret i1 %cmp
+}
+
+; 'ashr x, C2' produces [INT_MIN >> C2, INT_MAX >> C2]
+define i1 @ashr2(i32 %x) {
+; CHECK-LABEL: @ashr2(
+; CHECK-NEXT: ret i1 false
+;
+ %s = ashr i32 %x, 30
+ %c = icmp slt i32 %s, -5
+ ret i1 %c
+}
+
+; 'ashr C2, x' produces [C2, C2 >> (Width-1)]
+define i1 @ashr_sgt_false(i32 %a) {
+; CHECK-LABEL: @ashr_sgt_false(
+; CHECK-NEXT: ret i1 false
+;
+ %shr = ashr i32 -30, %a
+ %cmp = icmp sgt i32 %shr, -1
+ ret i1 %cmp
+}
+
+; 'ashr C2, x' produces [C2, C2 >> (Width-1)]
+define i1 @exact_ashr_sgt_false(i32 %a) {
+; CHECK-LABEL: @exact_ashr_sgt_false(
+; CHECK-NEXT: ret i1 false
+;
+ %shr = ashr exact i32 -30, %a
+ %cmp = icmp sgt i32 %shr, -15
+ ret i1 %cmp
+}
+
+; 'or x, C2' produces [C2, UINT_MAX]
+define i1 @or1(i32 %X) {
+; CHECK-LABEL: @or1(
+; CHECK-NEXT: ret i1 false
+;
+ %A = or i32 %X, 62
+ %B = icmp ult i32 %A, 50
+ ret i1 %B
+}
+
+; 'and x, C2' produces [0, C2]
+define i1 @and1(i32 %X) {
+; CHECK-LABEL: @and1(
+; CHECK-NEXT: ret i1 false
+;
+ %A = and i32 %X, 62
+ %B = icmp ugt i32 %A, 70
+ ret i1 %B
+}
+
+; 'add nuw x, C2' produces [C2, UINT_MAX]
+define i1 @tautological9(i32 %x) {
+; CHECK-LABEL: @tautological9(
+; CHECK-NEXT: ret i1 true
+;
+ %add = add nuw i32 %x, 13
+ %cmp = icmp ne i32 %add, 12
+ ret i1 %cmp
+}
+