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ASoC: rt5677: set PLL_CTRL2 non-volatile
authorBard Liao <bardliao@realtek.com>
Fri, 18 Dec 2015 02:16:23 +0000 (10:16 +0800)
committerMark Brown <broonie@kernel.org>
Wed, 23 Dec 2015 00:36:40 +0000 (00:36 +0000)
There is a status bit on RT5677_PLL1_CTRL2 and RT5677_PLL2_CTRL2.
That's why those registers are set volatile. However, the status
bit is currently not used by codec driver. So, it should be no
problem if we set them non-volatile.
The purpose of setting them non-volatile is to restore the setting
after a syspend/resume cycle.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt5677.c

index f73fd12..13fef00 100644 (file)
@@ -297,8 +297,6 @@ static bool rt5677_volatile_register(struct device *dev, unsigned int reg)
        case RT5677_HAP_GENE_CTRL2:
        case RT5677_PWR_DSP_ST:
        case RT5677_PRIV_DATA:
-       case RT5677_PLL1_CTRL2:
-       case RT5677_PLL2_CTRL2:
        case RT5677_ASRC_22:
        case RT5677_ASRC_23:
        case RT5677_VAD_CTRL5: