[X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333714 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
index 650e644..e24f7df 100644 (file)
--- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
+++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
@@ -1341,7 +1341,7 @@ static int readModRM(struct InternalInstruction* insn) {
 
   reg |= rFromREX(insn->rexPrefix) << 3;
   rm  |= bFromREX(insn->rexPrefix) << 3;
-  if (insn->vectorExtensionType == TYPE_EVEX) {
+  if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT) {
     reg |= r2FromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4;
     rm  |=  xFromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4;
   }
@@ -1759,7 +1759,7 @@ static int readOperands(struct InternalInstruction* insn) {
         insn->sibIndex = (SIBIndex)4;
 
       // If EVEX.v2 is set this is one of the 16-31 registers.
-      if (insn->vectorExtensionType == TYPE_EVEX &&
+      if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT &&
           v2FromEVEX4of4(insn->vectorExtensionPrefix[3]))
         insn->sibIndex = (SIBIndex)(insn->sibIndex + 16);
 

diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt
index edd3804..fc0f4c4 100644 (file)
--- a/test/MC/Disassembler/X86/x86-32.txt
+++ b/test/MC/Disassembler/X86/x86-32.txt
@@ -884,8 +884,8 @@
 #CHECK: enclv
 0x0f 0x01 0xc0
 
-#CHECK: vaddps %xmm2, %xmm1, %xmm16
+#CHECK: vaddps %xmm2, %xmm1, %xmm0
 0x62 0xe1 0x74 0x00 0x58 0xc2
 
-#CHECK: vgatherdps (%esi,%zmm16,4), %zmm1 {%k2}
+#CHECK: vgatherdps (%esi,%zmm0,4), %zmm1 {%k2}
 0x62 0xf2 0x7d 0x42 0x92 0x0c 0x86