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ASoC: Mediatek: MT8183: add I2S2 control path from UL2 and UL3
authorShunli Wang <shunli.wang@mediatek.com>
Tue, 9 Apr 2019 09:13:37 +0000 (17:13 +0800)
committerMark Brown <broonie@kernel.org>
Thu, 2 May 2019 01:46:18 +0000 (10:46 +0900)
This patch add the control path from UL2 or UL3 to I2S2.
The patch is based on broonie tree "for-next" branch.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/mediatek/mt8183/mt8183-afe-pcm.c

index 43be51b..1bc0faf 100644 (file)
@@ -291,11 +291,15 @@ static struct snd_soc_dai_driver mt8183_memif_dai_driver[] = {
 static const struct snd_kcontrol_new memif_ul1_ch1_mix[] = {
        SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN21,
                                    I_ADDA_UL_CH1, 1, 0),
+       SOC_DAPM_SINGLE_AUTODISABLE("I2S0_CH1", AFE_CONN21,
+                                   I_I2S0_CH1, 1, 0),
 };
 
 static const struct snd_kcontrol_new memif_ul1_ch2_mix[] = {
        SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN22,
                                    I_ADDA_UL_CH2, 1, 0),
+       SOC_DAPM_SINGLE_AUTODISABLE("I2S0_CH2", AFE_CONN21,
+                                   I_I2S0_CH2, 1, 0),
 };
 
 static const struct snd_kcontrol_new memif_ul2_ch1_mix[] = {
@@ -307,6 +311,8 @@ static const struct snd_kcontrol_new memif_ul2_ch1_mix[] = {
                                    I_DL2_CH1, 1, 0),
        SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN5,
                                    I_DL3_CH1, 1, 0),
+       SOC_DAPM_SINGLE_AUTODISABLE("I2S2_CH1", AFE_CONN5,
+                                   I_I2S2_CH1, 1, 0),
 };
 
 static const struct snd_kcontrol_new memif_ul2_ch2_mix[] = {
@@ -318,16 +324,22 @@ static const struct snd_kcontrol_new memif_ul2_ch2_mix[] = {
                                    I_DL2_CH2, 1, 0),
        SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN6,
                                    I_DL3_CH2, 1, 0),
+       SOC_DAPM_SINGLE_AUTODISABLE("I2S2_CH2", AFE_CONN6,
+                                   I_I2S2_CH2, 1, 0),
 };
 
 static const struct snd_kcontrol_new memif_ul3_ch1_mix[] = {
        SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN32,
                                    I_ADDA_UL_CH1, 1, 0),
+       SOC_DAPM_SINGLE_AUTODISABLE("I2S2_CH1", AFE_CONN32,
+                                   I_I2S2_CH1, 1, 0),
 };
 
 static const struct snd_kcontrol_new memif_ul3_ch2_mix[] = {
        SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN33,
                                    I_ADDA_UL_CH2, 1, 0),
+       SOC_DAPM_SINGLE_AUTODISABLE("I2S2_CH2", AFE_CONN33,
+                                   I_I2S2_CH2, 1, 0),
 };
 
 static const struct snd_kcontrol_new memif_ul4_ch1_mix[] = {
@@ -380,16 +392,22 @@ static const struct snd_soc_dapm_route mt8183_memif_routes[] = {
        {"UL1", NULL, "UL1_CH2"},
        {"UL1_CH1", "ADDA_UL_CH1", "ADDA Capture"},
        {"UL1_CH2", "ADDA_UL_CH2", "ADDA Capture"},
+       {"UL1_CH1", "I2S0_CH1", "I2S0"},
+       {"UL1_CH2", "I2S0_CH2", "I2S0"},
 
        {"UL2", NULL, "UL2_CH1"},
        {"UL2", NULL, "UL2_CH2"},
        {"UL2_CH1", "ADDA_UL_CH1", "ADDA Capture"},
        {"UL2_CH2", "ADDA_UL_CH2", "ADDA Capture"},
+       {"UL2_CH1", "I2S2_CH1", "I2S2"},
+       {"UL2_CH2", "I2S2_CH2", "I2S2"},
 
        {"UL3", NULL, "UL3_CH1"},
        {"UL3", NULL, "UL3_CH2"},
        {"UL3_CH1", "ADDA_UL_CH1", "ADDA Capture"},
        {"UL3_CH2", "ADDA_UL_CH2", "ADDA Capture"},
+       {"UL3_CH1", "I2S2_CH1", "I2S2"},
+       {"UL3_CH2", "I2S2_CH2", "I2S2"},
 
        {"UL4", NULL, "UL4_CH1"},
        {"UL4", NULL, "UL4_CH2"},
@@ -421,7 +439,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = DL1_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_DL2] = {
                .name = "DL2",
@@ -438,7 +458,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = DL2_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_DL3] = {
                .name = "DL3",
@@ -455,7 +477,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = DL3_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_VUL2] = {
                .name = "VUL2",
@@ -472,7 +496,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = VUL2_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_AWB] = {
                .name = "AWB",
@@ -489,7 +515,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = AWB_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_AWB2] = {
                .name = "AWB2",
@@ -506,7 +534,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = AWB2_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_VUL12] = {
                .name = "VUL12",
@@ -523,7 +553,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = VUL12_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_MOD_DAI] = {
                .name = "MOD_DAI",
@@ -540,7 +572,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = MOD_DAI_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
        [MT8183_MEMIF_HDMI] = {
                .name = "HDMI",
@@ -553,10 +587,13 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
                .mono_reg = -1,
                .mono_shift = -1,
                .enable_reg = -1,       /* control in tdm for sync start */
+               .enable_shift = -1,
                .hd_reg = AFE_MEMIF_HD_MODE,
                .hd_shift = HDMI_HD_SFT,
                .agent_disable_reg = -1,
+               .agent_disable_shift = -1,
                .msb_reg = -1,
+               .msb_shift = -1,
        },
 };
 
@@ -671,6 +708,7 @@ static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = {
                .irq_cnt_shift = 0,
                .irq_cnt_maskbit = 0x3ffff,
                .irq_fs_reg = -1,
+               .irq_fs_shift = -1,
                .irq_fs_maskbit = -1,
                .irq_en_reg = AFE_IRQ_MCU_CON0,
                .irq_en_shift = IRQ8_MCU_ON_SFT,