phy: qcom-qmp-combo: drop start and pwrdn-ctrl abstraction

All USB PHYs need to start and stop the SerDes and PCS so drop the
start-ctrl abstraction which is no longer needed since the QMP driver
split.

Similarly, drop the pwrdn-ctrl abstraction which also is not needed
since the split.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221012085002.24099-15-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 0071c73..2fab8d5 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -851,9 +851,6 @@ struct qmp_phy_cfg {
        /* array of registers with different offsets */
        const unsigned int *regs;
 
-       unsigned int start_ctrl;
-       unsigned int pwrdn_ctrl;
-
        /* true, if PHY needs delay after POWER_DOWN */
        bool has_pwrdn_delay;
 
@@ -1019,9 +1016,6 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1087,9 +1081,6 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1121,9 +1112,6 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x300,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1189,9 +1177,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x300,
-
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
 };
 
 static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
@@ -1259,9 +1244,6 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
        .pcs_usb_offset         = 0x300,
 
-       .start_ctrl             = SERDES_START | PCS_START,
-       .pwrdn_ctrl             = SW_PWRDN,
-
        .has_pwrdn_delay        = true,
 };
 
@@ -1944,8 +1926,7 @@ static int qmp_combo_com_init(struct qmp_phy *qphy)
        qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
        qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
 
-       qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
-                       cfg->pwrdn_ctrl);
+       qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN);
 
        mutex_unlock(&qmp->phy_mutex);
 
@@ -2049,7 +2030,8 @@ static int qmp_combo_power_on(struct phy *phy)
                /* Pull PHY out of reset state */
                qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
                /* start SerDes and Phy-Coding-Sublayer */
-               qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+               qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL],
+                               SERDES_START | PCS_START);
 
                status = pcs + cfg->regs[QPHY_PCS_STATUS];
                ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 200,
@@ -2082,11 +2064,12 @@ static int qmp_combo_power_off(struct phy *phy)
                qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
 
                /* stop SerDes and Phy-Coding-Sublayer */
-               qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+               qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL],
+                               SERDES_START | PCS_START);
 
                /* Put PHY into POWER DOWN state: active low */
                qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
-                               cfg->pwrdn_ctrl);
+                               SW_PWRDN);
        }
 
        return 0;