arm64: tegra: Enable DFLL clock on Smaug

Enable DFLL clock for Smaug board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index 9a8f6b0..a4b8f66 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1698,6 +1698,18 @@
                status = "okay";
        };
 
+       clock@70110000 {
+               status = "okay";
+               nvidia,cf = <6>;
+               nvidia,ci = <0>;
+               nvidia,cg = <2>;
+               nvidia,droop-ctrl = <0x00000f00>;
+               nvidia,force-mode = <1>;
+               nvidia,i2c-fs-rate = <400000>;
+               nvidia,sample-rate = <12500>;
+               vdd-cpu-supply = <&max77621_cpu>;
+       };
+
        aconnect@702c0000 {
                status = "okay";