powerpc/64s/radix: Remove bolted-SLB address limit for per-cpu stacks

Radix MMU does not take SLB or TLB interrupts when accessing kernel
linear address. Remove this restriction for radix mode.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index af23d4b..7393bac 100644 (file)
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -564,6 +564,9 @@ static __init u64 safe_stack_limit(void)
        /* Other BookE, we assume the first GB is bolted */
        return 1ul << 30;
 #else
+       if (early_radix_enabled())
+               return ULONG_MAX;
+
        /* BookS, the first segment is bolted */
        if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
                return 1UL << SID_SHIFT_1T;
@@ -578,7 +581,8 @@ void __init irqstack_early_init(void)
 
        /*
         * Interrupt stacks must be in the first segment since we
-        * cannot afford to take SLB misses on them.
+        * cannot afford to take SLB misses on them. They are not
+        * accessed in realmode.
         */
        for_each_possible_cpu(i) {
                softirq_ctx[i] = (struct thread_info *)
@@ -649,8 +653,9 @@ void __init emergency_stack_init(void)
         * aligned.
         *
         * Since we use these as temporary stacks during secondary CPU
-        * bringup, we need to get at them in real mode. This means they
-        * must also be within the RMO region.
+        * bringup, machine check, system reset, and HMI, we need to get
+        * at them in real mode. This means they must also be within the RMO
+        * region.
         *
         * The IRQ stacks allocated elsewhere in this file are zeroed and
         * initialized in kernel/irq.c. These are initialized here in order