struct pinmux_data_reg *drp;
int k;
- for (k = pfc->info->first_gpio; k <= pfc->info->last_gpio; k++)
+ for (k = 0; k < pfc->info->nr_gpios; k++)
sh_pfc_setup_data_reg(pfc, k);
k = 0;
gc->set = sh_gpio_set;
gc->to_irq = sh_gpio_to_irq;
- WARN_ON(pfc->info->first_gpio != 0); /* needs testing */
-
gc->label = pfc->info->name;
gc->owner = THIS_MODULE;
- gc->base = pfc->info->first_gpio;
- gc->ngpio = (pfc->info->last_gpio - pfc->info->first_gpio) + 1;
+ gc->base = 0;
+ gc->ngpio = pfc->info->nr_gpios;
}
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
pfc->gpio = chip;
- pr_info("%s handling gpio %d -> %d\n",
- pfc->info->name, pfc->info->first_gpio,
- pfc->info->last_gpio);
+ pr_info("%s handling gpio 0 -> %u\n",
+ pfc->info->name, pfc->info->nr_gpios - 1);
return 0;
}
.function = { PINMUX_FUNCTION_BEGIN,
PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PORT0,
- .last_gpio = GPIO_FN_TRACEAUD_FROM_MEMC,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_SCK4_B,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_LCD_DATA0,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA3,
- .last_gpio = GPIO_FN_LCD_M_DISP,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA1,
- .last_gpio = GPIO_FN_LCD_M_DISP,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PORT0,
- .last_gpio = GPIO_FN_SDENC_DV_CLKI,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PORT0,
- .last_gpio = GPIO_FN_FSIAISLD_PU,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PTA7,
- .last_gpio = GPIO_FN_STATUS1,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PTA7,
- .last_gpio = GPIO_FN_KEYOUT5_IN5,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PTA7,
- .last_gpio = GPIO_FN_IDEA0,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PTA7,
- .last_gpio = GPIO_FN_INTC_IRQ0,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_ST_CLKOUT,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PTA0,
- .last_gpio = GPIO_FN_ON_DQ0,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_IRQOUT,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_IRL4,
-
.gpios = pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(pinmux_gpios),
+
.cfg_regs = pinmux_config_regs,
.data_regs = pinmux_data_regs,
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_STATUS0,
.gpios = shx3_pinmux_gpios,
+ .nr_gpios = ARRAY_SIZE(shx3_pinmux_gpios),
.gpio_data = shx3_pinmux_data,
.gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
.cfg_regs = shx3_pinmux_config_regs,
{
int i;
- pmx->nr_pads = pfc->info->last_gpio - pfc->info->first_gpio + 1;
+ pmx->nr_pads = pfc->info->nr_gpios;
pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
GFP_KERNEL);
return -ENOMEM;
}
- /*
- * We don't necessarily have a 1:1 mapping between pin and linux
- * GPIO number, as the latter maps to the associated enum_id.
- * Care needs to be taken to translate back to pin space when
- * dealing with any pin configurations.
- */
for (i = 0; i < pmx->nr_pads; i++) {
struct pinctrl_pin_desc *pin = pmx->pads + i;
struct pinmux_gpio *gpio = pfc->info->gpios + i;
- pin->number = pfc->info->first_gpio + i;
+ pin->number = i;
pin->name = gpio->name;
/* XXX */
pmx->range.name = DRV_NAME,
pmx->range.id = 0;
- pmx->range.npins = pfc->info->last_gpio - pfc->info->first_gpio + 1;
- pmx->range.base = pfc->info->first_gpio;
- pmx->range.pin_base = pfc->info->first_gpio;
+ pmx->range.npins = pfc->info->nr_gpios;
+ pmx->range.base = 0;
+ pmx->range.pin_base = 0;
pinctrl_add_gpio_range(pmx->pctl, &pmx->range);
struct pinmux_range mark;
struct pinmux_range function;
- unsigned first_gpio, last_gpio;
-
struct pinmux_gpio *gpios;
+ unsigned int nr_gpios;
+
struct pinmux_cfg_reg *cfg_regs;
struct pinmux_data_reg *data_regs;