Intel cache info, by Filip Navara.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3162 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-i386/helper.c b/target-i386/helper.c
index 3c051b9..64c3a61 100644 (file)
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1657,10 +1657,10 @@ void helper_cpuid(void)
         break;
     case 2:
         /* cache info: needed for Pentium Pro compatibility */
-        EAX = 0x410601;
+        EAX = 1;
         EBX = 0;
         ECX = 0;
-        EDX = 0;
+        EDX = 0x2c307d;
         break;
     case 0x80000000:
         EAX = env->cpuid_xlevel;