msm/drm: Move msm_drm_config configuration into the GPUs

With the upcoming secure code the decision tree for configuration
(deciding where virtual addresses start/stop, etc) is going to get
a bit more complex. Head issues off at the pass by moving the
configuration into the GPU specific code.  This does result in a
bit more code duplication but it is a lot cleaner.

Change-Id: Ic0dedbad57c11a4bba01825214d0a7853ab537ba
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index c4f886f..a417e42 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -466,6 +466,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
        struct msm_gpu *gpu;
        struct msm_drm_private *priv = dev->dev_private;
        struct platform_device *pdev = priv->gpu_pdev;
+       struct msm_gpu_config a3xx_config = { 0 };
        int ret;
 
        if (!pdev) {
@@ -491,7 +492,13 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
        adreno_gpu->registers = a3xx_registers;
        adreno_gpu->reg_offsets = a3xx_register_offsets;
 
-       ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);
+       a3xx_config.ioname = MSM_GPU_DEFAULT_IONAME;
+       a3xx_config.irqname = MSM_GPU_DEFAULT_IRQNAME;
+       a3xx_config.nr_rings = 1;
+       a3xx_config.va_start = 0x300000;
+       a3xx_config.va_end = 0xffffffff;
+
+       ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, &a3xx_config);
        if (ret)
                goto fail;
 

diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 534a7c3..069823f 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -543,6 +543,7 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
        struct msm_gpu *gpu;
        struct msm_drm_private *priv = dev->dev_private;
        struct platform_device *pdev = priv->gpu_pdev;
+       struct msm_gpu_config a4xx_config = { 0 };
        int ret;
 
        if (!pdev) {
@@ -568,7 +569,13 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
        adreno_gpu->registers = a4xx_registers;
        adreno_gpu->reg_offsets = a4xx_register_offsets;
 
-       ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);
+       a4xx_config.ioname = MSM_GPU_DEFAULT_IONAME;
+       a4xx_config.irqname = MSM_GPU_DEFAULT_IRQNAME;
+       a4xx_config.nr_rings = 1;
+       a4xx_config.va_start = 0x300000;
+       a4xx_config.va_end = 0xffffffff;
+
+       ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, &a4xx_config);
        if (ret)
                goto fail;
 

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 32b2c7f..ec75d17 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1306,6 +1306,7 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
        struct a5xx_gpu *a5xx_gpu = NULL;
        struct adreno_gpu *adreno_gpu;
        struct msm_gpu *gpu;
+       struct msm_gpu_config a5xx_config = { 0 };
        int ret;
 
        if (!pdev) {
@@ -1329,7 +1330,20 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
        /* Check the efuses for some configuration */
        a5xx_efuses_read(pdev, adreno_gpu);
 
-       ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 4);
+       a5xx_config.ioname = MSM_GPU_DEFAULT_IONAME;
+       a5xx_config.irqname = MSM_GPU_DEFAULT_IRQNAME;
+
+       /* Set the number of rings to 4 - yay preemption */
+       a5xx_config.nr_rings = 4;
+
+       /*
+        * Set the user domain range to fall into the TTBR1 region for global
+        * objects
+        */
+       a5xx_config.va_start = 0x800000000;
+       a5xx_config.va_end = 0x8ffffffff;
+
+       ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, &a5xx_config);
        if (ret) {
                a5xx_destroy(&(a5xx_gpu->base.base));
                return ERR_PTR(ret);

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index aea2751..19ce41e 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -519,10 +519,10 @@ static int adreno_of_parse(struct platform_device *pdev, struct msm_gpu *gpu)
 
 int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
                struct adreno_gpu *adreno_gpu,
-               const struct adreno_gpu_funcs *funcs, int nr_rings)
+               const struct adreno_gpu_funcs *funcs,
+               struct msm_gpu_config *gpu_config)
 {
        struct adreno_platform_config *config = pdev->dev.platform_data;
-       struct msm_gpu_config adreno_gpu_config  = { 0 };
        struct msm_gpu *gpu = &adreno_gpu->base;
        struct msm_mmu *mmu;
        int ret;
@@ -536,26 +536,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
        /* Get the rest of the target configuration from the device tree */
        adreno_of_parse(pdev, gpu);
 
-       adreno_gpu_config.ioname = "kgsl_3d0_reg_memory";
-       adreno_gpu_config.irqname = "kgsl_3d0_irq";
-       adreno_gpu_config.nr_rings = nr_rings;
-
-       adreno_gpu_config.va_start = SZ_16M;
-       adreno_gpu_config.va_end = 0xffffffff;
-
-       if (adreno_gpu->revn >= 500) {
-               /* 5XX targets use a 64 bit region */
-               adreno_gpu_config.va_start = 0x800000000;
-               adreno_gpu_config.va_end = 0x8ffffffff;
-       } else {
-               adreno_gpu_config.va_start = 0x300000;
-               adreno_gpu_config.va_end = 0xffffffff;
-       }
-
-       adreno_gpu_config.nr_rings = nr_rings;
-
        ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
-                       adreno_gpu->info->name, &adreno_gpu_config);
+                       adreno_gpu->info->name, gpu_config);
        if (ret)
                return ret;
 

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 8e8f3e5..3f9bc65 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -257,7 +257,7 @@ struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu);
 
 int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
                struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,
-               int nr_rings);
+               struct msm_gpu_config *config);
 void adreno_gpu_cleanup(struct adreno_gpu *gpu);
 
 void adreno_snapshot(struct msm_gpu *gpu, struct msm_snapshot *snapshot);

diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 3fac423..29e2e59 100644 (file)
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -29,6 +29,9 @@
 struct msm_gem_submit;
 struct msm_gpu_perfcntr;
 
+#define MSM_GPU_DEFAULT_IONAME  "kgsl_3d0_reg_memory"
+#define MSM_GPU_DEFAULT_IRQNAME "kgsl_3d0_irq"
+
 struct msm_gpu_config {
        const char *ioname;
        const char *irqname;