Merge the pciid work. Use lock step versioning with the drm.

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card.c b/src/mesa/drivers/dri/nouveau/nouveau_card.c
index 4a5d5eb..a062838 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_card.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_card.c
@@ -1,48 +1,18 @@
 
 #include "nouveau_card.h"
 #include "nouveau_reg.h"
-
-static nouveau_card nouveau_card_list[]={
-//{0x0010,     "Riva 128",                     ????,                           NV_03,  0},
-{0x0020,       "TNT/TNT2",                     NV04_DX6_MULTITEX_TRIANGLE,     NV_04,  0},
-{0x00A0,       "TNT2",                         NV04_DX6_MULTITEX_TRIANGLE,     NV_04,  0},
-{0x0100,       "GeForce",                      NV10_TCL_PRIMITIVE_3D,          NV_10,  0},
-{0x0110,       "GeForce 2 MX",                 NV15_TCL_PRIMITIVE_3D|0x1100,   NV_10,  0},
-{0x01A0,       "NForce",                       NV15_TCL_PRIMITIVE_3D|0x1100,   NV_10,  0},
-{0x0150,       "GeForce 2",                    NV15_TCL_PRIMITIVE_3D,          NV_10,  0},
-{0x0170,       "GeForce 4 MX",                 NV15_TCL_PRIMITIVE_3D|0x1700,   NV_10,  NV_HAS_LMA},
-{0x0180,       "GeForce 4 MX",                 NV15_TCL_PRIMITIVE_3D|0x1700,   NV_10,  NV_HAS_LMA},
-{0x01F0,       "NForce 2",                     NV15_TCL_PRIMITIVE_3D|0x1700,   NV_10,  NV_HAS_LMA},
-{0x0200,       "GeForce 3",                    NV20_TCL_PRIMITIVE_3D|0x2000,   NV_20,  NV_HAS_LMA},
-{0x0250,       "GeForce 4 Ti",                 NV20_TCL_PRIMITIVE_3D|0x2500,   NV_20,  NV_HAS_LMA},
-{0x0280,       "GeForce 4 Ti",                 NV20_TCL_PRIMITIVE_3D|0x2500,   NV_20,  NV_HAS_LMA},
-{0x0320,       "GeForce FX 5200/5500",         NV30_TCL_PRIMITIVE_3D|0x3400,   NV_30,  NV_HAS_LMA},
-{0x0310,       "GeForce FX 5600",              NV30_TCL_PRIMITIVE_3D|0x3000,   NV_30,  NV_HAS_LMA},
-{0x0340,       "GeForce FX 5700",              NV30_TCL_PRIMITIVE_3D|0x3500,   NV_30,  NV_HAS_LMA},
-{0x0300,       "GeForce FX 5800",              NV30_TCL_PRIMITIVE_3D|0x3000,   NV_30,  NV_HAS_LMA},
-{0x0330,       "GeForce FX 5900",              NV30_TCL_PRIMITIVE_3D|0x3500,   NV_30,  NV_HAS_LMA},
-{0x0240,       "GeForce 6100",                 NV30_TCL_PRIMITIVE_3D|0x4400,   NV_40,  NV_HAS_LMA},
-{0x0160,       "GeForce 6200",                 NV30_TCL_PRIMITIVE_3D|0x4400,   NV_40,  NV_HAS_LMA},
-{0x0220,       "GeForce 6200",                 NV30_TCL_PRIMITIVE_3D|0x4400,   NV_40,  NV_HAS_LMA},
-{0x0140,       "GeForce 6200/6600",            NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x0040,       "GeForce 6800",                 NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x00C0,       "GeForce 6800",                 NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x0210,       "GeForce 6800",                 NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x01D0,       "GeForce 7200/7300/7400",       NV30_TCL_PRIMITIVE_3D|0x4400,   NV_40,  NV_HAS_LMA},
-{0x0390,       "GeForce 7300/7600",            NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x02E0,       "GeForce 7300/7600",            NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x0090,       "GeForce 7800",                 NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-{0x0290,       "GeForce 7900",                 NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-/* catchall */
-{0x0000,       "Unknown card",                 NV30_TCL_PRIMITIVE_3D|0x4000,   NV_40,  NV_HAS_LMA},
-};
+#include "nouveau_drm.h"
+// FIXME hack for now
+#define NV15_TCL_PRIMITIVE_3D 0x0096
+#define NV17_TCL_PRIMITIVE_3D 0x0099
+#include "nouveau_card_list.h"
 
 
 nouveau_card* nouveau_card_lookup(uint32_t device_id)
 {
        int i;
        for(i=0;i<sizeof(nouveau_card_list)/sizeof(nouveau_card)-1;i++)
-               if (nouveau_card_list[i].id==(device_id&0xfff0))
+               if (nouveau_card_list[i].id==(device_id&0xffff))
                        break;
        return &(nouveau_card_list[i]);
 }

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
new file mode 100644 (file)
index 0000000..f8ea3c3
--- /dev/null
+++ b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
@@ -0,0 +1,229 @@
+static nouveau_card nouveau_card_list[]={
+{0x0008,  "EDGE 3D",                               0,                             NV_03, 0},
+{0x0009,  "EDGE 3D",                               0,                             NV_03, 0},
+{0x0010,  "Mutara V08",                            0,                             NV_03, 0},
+{0x0020,  "RIVA TNT",                              NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x0028,  "RIVA TNT2/TNT2 Pro",                    NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x0029,  "RIVA TNT2 Ultra",                       NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002A,  "Riva TnT2",                             NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002B,  "Riva TnT2",                             NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002C,  "Vanta/Vanta LT",                        NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002D,  "RIVA TNT2 Model 64/Model 64 Pro",       NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002E,  "Vanta",                                 NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002F,  "Vanta",                                 NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x0040,  "GeForce 6800 Ultra",                    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0041,  "GeForce 6800",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0042,  "GeForce 6800 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0043,  "NV40.3",                                NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0044,  "GeForce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0045,  "GeForce 6800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0046,  "GeForce 6800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0047,  "GeForce 6800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0048,  "GeForce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0049,  "NV40GL",                                NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x004D,  "Quadro FX 4000",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x004E,  "Quadro FX 4000",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0090,  "GeForce 7800 GTX",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0091,  "GeForce 7800 GTX",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0092,  "GeForce 7800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0093,  "GeForce 7800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0098,  "GeForce Go 7800",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0099,  "GE Force Go 7800 GTX",                  NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x009D,  "Quadro FX4500",                         NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00A0,  "Aladdin TNT2",                          NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x00C0,  "GeForce 6800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00C1,  "GeForce 6800",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00C2,  "GeForce 6800 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00C3,  "Geforce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00C8,  "GeForce Go 6800",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00C9,  "GeForce Go 6800 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00CC,  "Quadro FX Go1400",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00CD,  "Quadro FX 3450/4000 SDI",               NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00CE,  "Quadro FX 1400",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F0,  "GeForce 6800/GeForce 6800 Ultra",       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F1,  "GeForce 6600/GeForce 6600 GT",          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F2,  "GeForce 6600/GeForce 6600 GT",          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F3,  "GeForce 6200",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F4,  "GeForce 6600 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F5,  "GeForce 7800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F6,  "GeForce 6600 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F8,  "Quadro FX 3400/4400",                   NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00F9,  "GeForce 6800 Ultra/GeForce 6800 GT",    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x00FA,  "GeForce PCX 5750",                      NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x00FB,  "GeForce PCX 5900",                      NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
+{0x00FC,  "Quadro FX 330/GeForce PCX 5300",        NV30_TCL_PRIMITIVE_3D|0x0600,  NV_30, 0},
+{0x00FD,  "Quadro FX 330/Quadro NVS280",           NV30_TCL_PRIMITIVE_3D|0x0600,  NV_30, 0},
+{0x00FE,  "Quadro FX 1300",                        NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x00FF,  "GeForce PCX 4300",                      NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0100,  "GeForce 256 SDR",                       NV10_TCL_PRIMITIVE_3D,         NV_10, 0},
+{0x0101,  "GeForce 256 DDR",                       NV10_TCL_PRIMITIVE_3D,         NV_10, 0},
+{0x0103,  "Quadro",                                NV10_TCL_PRIMITIVE_3D,         NV_10, 0},
+{0x0110,  "GeForce2 MX/MX 400",                    NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
+{0x0111,  "GeForce2 MX 100 DDR/200 DDR",           NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
+{0x0112,  "GeForce2 Go",                           NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
+{0x0113,  "Quadro2 MXR/EX/Go",                     NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
+{0x0140,  "GeForce 6600 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0141,  "GeForce 6600",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0142,  "GeForce 6600 PCIe",                     NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0144,  "GeForce Go 6600",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0145,  "GeForce 6610 XL",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0146,  "Geforce Go 6600TE/6200TE",              NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0148,  "GeForce Go 6600",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0149,  "GeForce Go 6600 GT",                    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x014A,  "Quadro NVS 440",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x014D,  "Quadro FX 550",                         NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x014E,  "Quadro FX 540",                         NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x014F,  "GeForce 6200",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0150,  "GeForce2 GTS/Pro",                      NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
+{0x0151,  "GeForce2 Ti",                           NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
+{0x0152,  "GeForce2 Ultra, Bladerunner",           NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
+{0x0153,  "Quadro2 Pro",                           NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
+{0x0161,  "GeForce 6200 TurboCache(TM)",           NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0162,  "GeForce 6200 SE TurboCache (TM)",       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0163,  "GeForce 6200 LE",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0164,  "GeForce Go 6200",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0165,  "Quadro NVS 285",                        NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0166,  "GeForce Go 6400",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0167,  "GeForce Go 6200 TurboCache",            NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0168,  "GeForce Go 6200 TurboCache",            NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0170,  "GeForce4 MX 460",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0171,  "GeForce4 MX 440",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0172,  "GeForce4 MX 420",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0173,  "GeForce4 MX 440-SE",                    NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0174,  "GeForce4 440 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0175,  "GeForce4 420 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0176,  "GeForce4 420 Go 32M",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0177,  "GeForce4 460 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0178,  "Quadro4 550 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0179,  "GeForce4 420 Go 32M",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x017A,  "Quadro4 200/400 NVS",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x017B,  "Quadro4 550 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x017C,  "Quadro4 500 GoGL",                      NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x017D,  "GeForce4 410 Go 16M",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0181,  "GeForce4 MX 440 AGP 8x",                NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0182,  "GeForce4 MX 440SE AGP 8x",              NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0183,  "GeForce4 MX 420 AGP 8x",                NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0185,  "GeForce4 MX 4000 AGP 8x",               NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0186,  "GeForce4 448 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0187,  "GeForce4 488 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0188,  "Quadro4 580 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x018A,  "Quadro4 NVS AGP 8x",                    NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x018B,  "Quadro4 380 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x018C,  "Quadro NVS 50 PCI",                     NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x018D,  "GeForce4 448 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0191,  "GeForce 8800 GTX",                      NV30_TCL_PRIMITIVE_3D|0x5000,  NV_50, 0},
+{0x0193,  "GeForce 8800 GTS",                      NV30_TCL_PRIMITIVE_3D|0x5000,  NV_50, 0},
+{0x01A0,  "GeForce2 MX Integrated Graphics",       NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
+{0x01D1,  "GeForce 7300 LE",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x01D6,  "GeForce Go 7200",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x01D7,  "Quadro NVS 110M / GeForce Go 7300",     NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x01D8,  "GeForce Go 7400",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x01DA,  "Quadro NVS 110M",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x01DF,  "GeForce 7300 GS",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x01F0,  "GeForce4 MX - nForce GPU",              NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
+{0x0200,  "GeForce3",                              NV20_TCL_PRIMITIVE_3D|0x2000,  NV_20, 0},
+{0x0201,  "GeForce3 Ti 200",                       NV20_TCL_PRIMITIVE_3D|0x2000,  NV_20, 0},
+{0x0202,  "GeForce3 Ti 500",                       NV20_TCL_PRIMITIVE_3D|0x2000,  NV_20, 0},
+{0x0203,  "Quadro DCC",                            NV20_TCL_PRIMITIVE_3D|0x2000,  NV_20, 0},
+{0x0211,  "GeForce 6800",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0212,  "GeForce 6800 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0215,  "GeForce 6800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0218,  "GeForce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0221,  "GeForce 6200",                          NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0240,  "GeForce 6150",                          NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0242,  "GeForce 6100",                          NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0250,  "GeForce4 Ti 4600",                      NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0251,  "GeForce4 Ti 4400",                      NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0252,  "GeForce4 Ti",                           NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0253,  "GeForce4 Ti 4200",                      NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0258,  "Quadro4 900 XGL",                       NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0259,  "Quadro4 750 XGL",                       NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x025B,  "Quadro4 700 XGL",                       NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0280,  "GeForce4 Ti 4800",                      NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0281,  "GeForce4 Ti 4200 AGP 8x",               NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0282,  "GeForce4 Ti 4800 SE",                   NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0286,  "GeForce4 Ti 4200 Go AGP 8x",            NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0288,  "Quadro4 980 XGL",                       NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0289,  "Quadro4 780 XGL",                       NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x028C,  "Quadro4 700 GoGL",                      NV20_TCL_PRIMITIVE_3D|0x2500,  NV_25, 0},
+{0x0290,  "GeForce 7900 GTX",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0291,  "GeForce 7900 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0292,  "GeForce 7900 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0298,  "GeForce Go 7900 GS",                    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0299,  "GeForce Go 7900 GTX",                   NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x029A,  "Quadro FX 2500M",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x029B,  "Quadro FX 1500M",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x029C,  "Quadro FX 5500",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x029D,  "Quadro FX 3500",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x029E,  "Quadro FX 1500",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x029F,  "Quadro FX 4500 X2",                     NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x02A0,  "XGPU",                                  NV20_TCL_PRIMITIVE_3D|0x2000,  NV_20, 0},
+{0x02E1,  "GeForce 7600 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0300,  "GeForce FX",                            NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0301,  "GeForce FX 5800 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0302,  "GeForce FX 5800",                       NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0308,  "Quadro FX 2000",                        NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0309,  "Quadro FX 1000",                        NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0311,  "GeForce FX 5600 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0312,  "GeForce FX 5600",                       NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0313,  "NV31",                                  NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0314,  "GeForce FX 5600XT",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0316,  "NV31M",                                 NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0317,  "NV31M Pro",                             NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x031A,  "GeForce FX Go5600",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x031B,  "GeForce FX Go5650",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x031D,  "NV31GLM",                               NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x031E,  "NV31GLM Pro",                           NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x031F,  "NV31GLM Pro",                           NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0320,  "GeForce FX 5200",                       NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0321,  "GeForce FX 5200 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0322,  "GeForce FX 5200",                       NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0323,  "GeForce FX 5200LE",                     NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0324,  "GeForce FX Go5200",                     NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0325,  "GeForce FX Go5250",                     NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0326,  "GeForce FX 5500",                       NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0327,  "GeForce FX 5100",                       NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0328,  "GeForce FX Go5200 32M/64M",             NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0329,  "GeForce FX Go5200",                     NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x032A,  "Quadro NVS 280 PCI",                    NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x032B,  "Quadro FX 500/600 PCI",                 NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x032C,  "GeForce FX Go 5300",                    NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x032D,  "GeForce FX Go5100",                     NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x032F,  "NV34GL",                                NV30_TCL_PRIMITIVE_3D|0x3400,  NV_34, 0},
+{0x0330,  "GeForce FX 5900 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
+{0x0331,  "GeForce FX 5900",                       NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
+{0x0332,  "GeForce FX 5900XT",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
+{0x0333,  "GeForce FX 5950 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0334,  "GeForce FX 5900ZT",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
+{0x0338,  "Quadro FX 3000",                        NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x033F,  "Quadro FX 700",                         NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0341,  "GeForce FX 5700 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0342,  "GeForce FX 5700",                       NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0343,  "GeForce FX 5700LE",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0344,  "GeForce FX 5700VE",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0345,  "NV36.5",                                NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0347,  "GeForce FX Go5700",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0348,  "GeForce FX Go5700",                     NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0349,  "NV36M Pro",                             NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x034B,  "NV36MAP",                               NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x034C,  "Quadro FX Go1000",                      NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x034E,  "Quadro FX 1100",                        NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x034F,  "NV36GL",                                NV30_TCL_PRIMITIVE_3D|0x3000,  NV_30, 0},
+{0x0391,  "GeForce 7600 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0392,  "GeForce 7600 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0393,  "GeForce 7300 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x0398,  "GeForce Go 7600",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
+{0x03D0,  "GeForce 6100 nForce 430",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x03D1,  "GeForce 6100 nForce 405",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x03D2,  "GeForce 6100 nForce 400",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x03D5,  "GeForce 6100 nForce 420",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
+{0x0008,  "NV1",                                   0,                             NV_03, 0},
+{0x0009,  "DAC64",                                 0,                             NV_03, 0},
+{0x0018,  "Riva128",                               0,                             NV_03, 0},
+{0x0019,  "Riva128ZX",                             0,                             NV_03, 0},
+{0x0020,  "TNT",                                   NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x0028,  "TNT2",                                  NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x0029,  "UTNT2",                                 NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x002C,  "VTNT2",                                 NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+{0x00A0,  "ITNT2",                                 NV04_DX6_MULTITEX_TRIANGLE,    NV_04, 0},
+};

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c
index 4ae0c68..b208d6c 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c
@@ -162,7 +162,8 @@ GLboolean nouveauCreateContext( const __GLcontextModes *glVisual,
                case NV_20:
                case NV_30:
                case NV_40:
-               case G_70:
+               case NV_44:
+               case NV_50:
                default:
                        nv10TriInitFunctions( ctx );
                        break;

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.h b/src/mesa/drivers/dri/nouveau/nouveau_context.h
index e488f9d..947e95d 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.h
@@ -155,18 +155,6 @@ typedef struct nouveau_context {
 
 #define NOUVEAU_CONTEXT(ctx)           ((nouveauContextPtr)(ctx->DriverCtx))
 
-/* Flags for what context state needs to be updated: */
-#define NOUVEAU_NEW_ALPHA              0x0001
-#define NOUVEAU_NEW_DEPTH              0x0002
-#define NOUVEAU_NEW_FOG                        0x0004
-#define NOUVEAU_NEW_CLIP               0x0008
-#define NOUVEAU_NEW_CULL               0x0010
-#define NOUVEAU_NEW_MASKS              0x0020
-#define NOUVEAU_NEW_RENDER_NOT         0x0040
-#define NOUVEAU_NEW_WINDOW             0x0080
-#define NOUVEAU_NEW_CONTEXT            0x0100
-#define NOUVEAU_NEW_ALL                        0x01ff
-
 /* Flags for software fallback cases: */
 #define NOUVEAU_FALLBACK_TEXTURE               0x0001
 #define NOUVEAU_FALLBACK_DRAW_BUFFER           0x0002

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
index 9fac6a4..0b745e1 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
@@ -90,7 +90,8 @@ void nouveauWaitForIdleLocked(nouveauContextPtr nmesa)
                        case NV_20:
                        case NV_30:
                        case NV_40:
-                       case G_70:
+                       case NV_44:
+                       case NV_50:
                        default:
                                status=NV_READ(NV04_STATUS);
                                break;

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
index 44b9f35..51993cf 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
@@ -60,7 +60,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define OUT_RINGp(ptr,sz) do {                                                  \
 uint32_t* p=(uint32_t*)(ptr);                                                  \
-int i; printf("OUT_RINGp: (size 0x%x dwords)\n",sz); for(i=0;i<sz;i++) printf(" 0x%08x\n", *(p+i));    \
+int i; printf("OUT_RINGp: (size 0x%x dwords)\n",sz); for(i=0;i<sz;i++) printf(" 0x%08x   %f\n", *(p+i), *((float*)(p+i)));     \
 }while(0)
 
 #define OUT_RING(n) do {                                                        \

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_reg.h b/src/mesa/drivers/dri/nouveau/nouveau_reg.h
index e79436c..077f06e 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_reg.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_reg.h
@@ -43,7 +43,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************
 
-   Created from objects.c rev. 1.346
+   Created from objects.c rev. 1.350
 */
 
 #ifndef _NOUVEAU_REG_H
@@ -185,7 +185,7 @@ Object NV04_DX6_MULTITEX_TRIANGLE used on: NV04 NV10 NV15
 #      define          NV04_DX6_MULTITEX_TRIANGLE_DRAW                         0x00000540      /* Parameters: v0 v1 v2 v3 v4 v5 */
 
 /****************************************** 
-Object NV04_COLOR_KEY used on: NV04 NV10 NV15 NV20 
+Object NV04_COLOR_KEY used on: NV04 NV10 NV15 NV20 NV40 
 */
 #define                        NV04_COLOR_KEY                                          0x00000057
 #      define          NV04_COLOR_KEY_SET_DMA_NOTIFY                           0x00000180
@@ -272,7 +272,7 @@ Object NV05_IMAGE_FROM_CPU used on: NV04
 #      define          NV05_IMAGE_FROM_CPU_COLOR( d)                           (0x00000400 + d * 0x0004)
 
 /****************************************** 
-Object NV_IMAGE_BLIT used on: NV04 NV10 NV15 NV20 
+Object NV_IMAGE_BLIT used on: NV04 NV10 NV15 NV20 NV40 
 */
 #define                        NV_IMAGE_BLIT                                           0x0000005f
 #      define          NV_IMAGE_BLIT_DMA_NOTIFY                                0x00000180
@@ -512,9 +512,9 @@ Object NV10_TCL_PRIMITIVE_3D used on: NV10
 #      define          NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_DATA                 0x00001800
 
 /****************************************** 
-Object NV15_TCL_PRIMITIVE_3D used on: NV15 
+Object NV11_TCL_PRIMITIVE_3D used on: NV15 
 */
-#define                        NV15_TCL_PRIMITIVE_3D                                   0x00000096
+#define                        NV11_TCL_PRIMITIVE_3D                                   0x00000096
 #      define          NV10_TCL_PRIMITIVE_3D_NOP                               0x00000100
 #      define          NV10_TCL_PRIMITIVE_3D_NOTIFY                            0x00000104
 #      define          NV10_TCL_PRIMITIVE_3D_SET_DMA_NOTIFY                    0x00000180

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
index 75da632..51f9fb1 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
@@ -338,7 +338,7 @@ void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIsc
        __DRIscreenPrivate *psp;
        static const __DRIversion ddx_expected = { 1, 2, 0 };
        static const __DRIversion dri_expected = { 4, 0, 0 };
-       static const __DRIversion drm_expected = { 1, 0, 0 };
+       static const __DRIversion drm_expected = { 0, 0, 1 };
 
        dri_interface = interface;
 
@@ -349,6 +349,10 @@ void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIsc
                return NULL;
        }
 
+       // temporary lock step versioning
+       if (drm_expected.patch!=drm_version->patch)
+               return NULL;
+
        psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
                                       ddx_version, dri_version, drm_version,
                                       frame_buffer, pSAREA, fd,

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader.c b/src/mesa/drivers/dri/nouveau/nouveau_shader.c
index 97ea1ee..63da842 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_shader.c
@@ -173,10 +173,11 @@ nouveauShaderInitFuncs(GLcontext * ctx)
       NV30FPInitShaderFuncs(&nmesa->FPfunc);
       break;
    case NV_40:
-   case G_70:
+   case NV_44:
       NV40VPInitShaderFuncs(&nmesa->VPfunc);
       NV40FPInitShaderFuncs(&nmesa->FPfunc);
       break;
+   case NV_50:
    default:
       return;
    }

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.c b/src/mesa/drivers/dri/nouveau/nouveau_state.c
index 1445ee7..88a8c9e 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_state.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_state.c
@@ -168,7 +168,7 @@ void nouveauDDInitState(nouveauContextPtr nmesa)
             break;
         case NV_30:
         case NV_40:
-        case G_70:
+        case NV_50:
             nv30InitStateFuncs(&nmesa->glCtx->Driver);
             break;
         default: