class ARMDAGToDAGISel : public SelectionDAGISel {
ARMTargetMachine &TM;
- ARMTargetLowering ARMLowering;
-
/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
/// make the right decision when generating code for different targets.
const ARMSubtarget *Subtarget;
public:
explicit ARMDAGToDAGISel(ARMTargetMachine &tm)
- : SelectionDAGISel(ARMLowering), TM(tm), ARMLowering(tm),
+ : SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
}
/// AlphaDAGToDAGISel - Alpha specific code to select Alpha machine
/// instructions for SelectionDAG operations.
class AlphaDAGToDAGISel : public SelectionDAGISel {
- AlphaTargetLowering AlphaLowering;
-
static const int64_t IMM_LOW = -32768;
static const int64_t IMM_HIGH = 32767;
static const int64_t IMM_MULT = 65536;
public:
explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM)
- : SelectionDAGISel(AlphaLowering),
- AlphaLowering(*TM.getTargetLowering())
+ : SelectionDAGISel(*TM.getTargetLowering())
{}
/// getI64Imm - Return a target constant with the specified value, of type
/// instructions for SelectionDAG operations.
///
class IA64DAGToDAGISel : public SelectionDAGISel {
- IA64TargetLowering IA64Lowering;
unsigned GlobalBaseReg;
public:
explicit IA64DAGToDAGISel(IA64TargetMachine &TM)
- : SelectionDAGISel(IA64Lowering), IA64Lowering(*TM.getTargetLowering()) {}
+ : SelectionDAGISel(*TM.getTargetLowering()) {}
virtual bool runOnFunction(Function &Fn) {
// Make sure we re-emit a set of the global base reg if necessary
/// TM - Keep a reference to MipsTargetMachine.
MipsTargetMachine &TM;
- /// MipsLowering - This object fully describes how to lower LLVM code to an
- /// Mips-specific SelectionDAG.
- MipsTargetLowering MipsLowering;
-
/// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
/// make the right decision when generating code for different targets.
const MipsSubtarget &Subtarget;
public:
explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
- SelectionDAGISel(MipsLowering),
- TM(tm), MipsLowering(*TM.getTargetLowering()),
- Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
+ SelectionDAGISel(*tm.getTargetLowering()),
+ TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
virtual void InstructionSelect();
/// TM - Keep a reference to PIC16TargetMachine.
PIC16TargetMachine &TM;
- /// PIC16Lowering - This object fully describes how to lower LLVM code to an
- /// PIC16-specific SelectionDAG.
- PIC16TargetLowering PIC16Lowering;
-
public:
explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
- SelectionDAGISel(PIC16Lowering),
- TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
+ SelectionDAGISel(*tm.getTargetLowering()),
+ TM(tm) {}
virtual void InstructionSelect();
///
class VISIBILITY_HIDDEN PPCDAGToDAGISel : public SelectionDAGISel {
PPCTargetMachine &TM;
- PPCTargetLowering PPCLowering;
+ PPCTargetLowering &PPCLowering;
const PPCSubtarget &PPCSubTarget;
unsigned GlobalBaseReg;
public:
explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
- : SelectionDAGISel(PPCLowering), TM(tm),
+ : SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
PPCLowering(*TM.getTargetLowering()),
PPCSubTarget(*TM.getSubtargetImpl()) {}
namespace llvm {
class FunctionPass;
class TargetMachine;
+ class SparcTargetMachine;
class raw_ostream;
- FunctionPass *createSparcISelDag(TargetMachine &TM);
+ FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM);
FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
///
namespace {
class SparcDAGToDAGISel : public SelectionDAGISel {
- SparcTargetLowering Lowering;
-
/// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
/// make the right decision when generating code for different targets.
const SparcSubtarget &Subtarget;
public:
- explicit SparcDAGToDAGISel(TargetMachine &TM)
- : SelectionDAGISel(Lowering), Lowering(TM),
+ explicit SparcDAGToDAGISel(SparcTargetMachine &TM)
+ : SelectionDAGISel(*TM.getTargetLowering()),
Subtarget(TM.getSubtarget<SparcSubtarget>()) {
}
/// createSparcISelDag - This pass converts a legalized DAG into a
/// SPARC-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createSparcISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createSparcISelDag(SparcTargetMachine &TM) {
return new SparcDAGToDAGISel(TM);
}
///
SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
: DataLayout("E-p:32:32-f128:128:128"),
- Subtarget(M, FS), InstrInfo(Subtarget),
+ Subtarget(M, FS), TLInfo(*this), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
#include "llvm/Target/TargetFrameInfo.h"
#include "SparcInstrInfo.h"
#include "SparcSubtarget.h"
+#include "SparcISelLowering.h"
namespace llvm {
class SparcTargetMachine : public LLVMTargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
SparcSubtarget Subtarget;
+ SparcTargetLowering TLInfo;
SparcInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
virtual const SparcRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
+ virtual SparcTargetLowering* getTargetLowering() const {
+ return const_cast<SparcTargetLowering*>(&TLInfo);
+ }
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
/// X86Lowering - This object fully describes how to lower LLVM code to an
/// X86-specific SelectionDAG.
- X86TargetLowering X86Lowering;
+ X86TargetLowering &X86Lowering;
/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
/// make the right decision when generating code for different targets.
public:
X86DAGToDAGISel(X86TargetMachine &tm, bool fast)
- : SelectionDAGISel(X86Lowering, fast),
+ : SelectionDAGISel(*tm.getTargetLowering(), fast),
TM(tm), X86Lowering(*TM.getTargetLowering()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
OptForSize(false) {}