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net/mlx5e: Rx, Fix checksum calculation for new hardware
authorSaeed Mahameed <saeedm@mellanox.com>
Fri, 3 May 2019 20:14:59 +0000 (13:14 -0700)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 11 Jul 2019 18:45:03 +0000 (11:45 -0700)
CQE checksum full mode in new HW, provides a full checksum of rx frame.
Covering bytes starting from eth protocol up to last byte in the received
frame (frame_size - ETH_HLEN), as expected by the stack.

Fixing up skb->csum by the driver is not required in such case. This fix
is to avoid wrong checksum calculation in drivers which already support
the new hardware with the new checksum mode.

Fixes: 85327a9c4150 ("net/mlx5: Update the list of the PCI supported devices")
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
include/linux/mlx5/mlx5_ifc.h

index cc6797e..cc227a7 100644 (file)
@@ -294,6 +294,7 @@ enum {
        MLX5E_RQ_STATE_ENABLED,
        MLX5E_RQ_STATE_AM,
        MLX5E_RQ_STATE_NO_CSUM_COMPLETE,
+       MLX5E_RQ_STATE_CSUM_FULL, /* cqe_csum_full hw bit is set */
 };
 
 struct mlx5e_cq {
index a8e8350..98d7527 100644 (file)
@@ -855,6 +855,9 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
        if (err)
                goto err_destroy_rq;
 
+       if (MLX5_CAP_ETH(c->mdev, cqe_checksum_full))
+               __set_bit(MLX5E_RQ_STATE_CSUM_FULL, &c->rq.state);
+
        if (params->rx_dim_enabled)
                __set_bit(MLX5E_RQ_STATE_AM, &c->rq.state);
 
index 13133e7..8a5f941 100644 (file)
@@ -873,8 +873,14 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
                if (unlikely(get_ip_proto(skb, network_depth, proto) == IPPROTO_SCTP))
                        goto csum_unnecessary;
 
+               stats->csum_complete++;
                skb->ip_summed = CHECKSUM_COMPLETE;
                skb->csum = csum_unfold((__force __sum16)cqe->check_sum);
+
+               if (test_bit(MLX5E_RQ_STATE_CSUM_FULL, &rq->state))
+                       return; /* CQE csum covers all received bytes */
+
+               /* csum might need some fixups ...*/
                if (network_depth > ETH_HLEN)
                        /* CQE csum is calculated from the IP header and does
                         * not cover VLAN headers (if present). This will add
@@ -885,7 +891,6 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
                                                 skb->csum);
 
                mlx5e_skb_padding_csum(skb, network_depth, proto, stats);
-               stats->csum_complete++;
                return;
        }
 
index 5e74305..7e42efa 100644 (file)
@@ -749,7 +749,8 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
        u8         swp[0x1];
        u8         swp_csum[0x1];
        u8         swp_lso[0x1];
-       u8         reserved_at_23[0xd];
+       u8         cqe_checksum_full[0x1];
+       u8         reserved_at_24[0xc];
        u8         max_vxlan_udp_ports[0x8];
        u8         reserved_at_38[0x6];
        u8         max_geneve_opt_len[0x1];