ARM: dts: Add device tree support for phycard pca100

Board files for Phytec phyCARD-S "System on Module" and "Rapid
Development Kit".

Based on patches from:

Steffen Trumtrar <s.trumtrar@pengutronix.de>:
 - Original patch
 - ARM: dts: Set partition offsets for phycard
 - ARM: dts: Use CSPI1 instead of CSPI2 on phycard pca100
 - ARM: imx27-phytec-phycard-S.dts: resize nand partitions

Jan Luebbe <jlu@pengutronix.de>:
 - ARM: dts: Enable bad block table in NAND

Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 641b3c9..721a7b2 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -112,6 +112,8 @@ dtb-$(CONFIG_ARCH_MXC) += \
        imx27-pdk.dtb \
        imx27-phytec-phycore-som.dtb \
        imx27-phytec-phycore-rdk.dtb \
+       imx27-phytec-phycard-s-som.dtb \
+       imx27-phytec-phycard-s-rdk.dtb \
        imx31-bug.dtb \
        imx51-apf51.dtb \
        imx51-apf51dev.dtb \

diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
new file mode 100644 (file)
index 0000000..390d8f2
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2012 Markus Pargmann, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycard-s-som.dts"
+
+/ {
+       model = "Phytec pca100 rapid development kit";
+       compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
+
+       display: display {
+               model = "Primeview-PD050VL1";
+               native-mode = <&timing0>;
+               bits-per-pixel = <16>;  /* non-standard but required */
+               fsl,pcr = <0xf0c88080>; /* non-standard but required */
+               display-timings {
+                       timing0: 640x480 {
+                               hactive = <640>;
+                               vactive = <480>;
+                               hback-porch = <112>;
+                               hfront-porch = <36>;
+                               hsync-len = <32>;
+                               vback-porch = <33>;
+                               vfront-porch = <33>;
+                               vsync-len = <2>;
+                               clock-frequency = <25000000>;
+                       };
+               };
+       };
+};
+
+&fb {
+       display = <&display>;
+       status = "okay";
+};
+
+&sdhci2 {
+       cd-gpios = <&gpio3 29 0>;
+       status = "okay";
+};
+
+&uart1 {
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&uart2 {
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&uart3 {
+       fsl,uart-has-rtscts;
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
new file mode 100644 (file)
index 0000000..ec52b6d
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar
+ * and Markus Pargmann, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx27.dtsi"
+
+/ {
+       model = "Phytec pca100";
+       compatible = "phytec,imx27-pca100", "fsl,imx27";
+
+       memory {
+               reg = <0xa0000000 0x08000000>; /* 128MB */
+       };
+};
+
+&cspi1 {
+       fsl,spi-num-chipselects = <2>;
+       cs-gpios = <&gpio4 28 0>,
+               <&gpio4 27 0>;
+       status = "okay";
+};
+
+&fec {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+
+       ioexpander@41 {
+               compatible = "nxp,pca9536";
+               reg = <0x41>;
+       };
+
+       rtc@51 {
+               compatible = "nxp,pcf8563";
+               reg = <0x51>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+
+       lm75@4a {
+               compatible = "national,lm75";
+               reg = <0x4a>;
+       };
+
+       rtc@51 {
+               compatible = "nxp,pcf8563";
+               reg = <0x51>;
+       };
+
+       at24@52 {
+               compatible = "at,24c32";
+               pagesize = <32>;
+               reg = <0x52>;
+       };
+};
+
+&owire {
+       status = "okay";
+};