#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffa0000 0x100>;
- interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
- 18 IRQ_TYPE_LEVEL_HIGH 0
- 19 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
+ <18 IRQ_TYPE_LEVEL_HIGH 0>,
+ <19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffa4000 0x100>;
- interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
- 21 IRQ_TYPE_LEVEL_HIGH 0
- 22 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>,
+ <21 IRQ_TYPE_LEVEL_HIGH 0>,
+ <22 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffa0000 0x100>;
- interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
- 18 IRQ_TYPE_LEVEL_HIGH 0
- 19 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
+ <18 IRQ_TYPE_LEVEL_HIGH 0>,
+ <19 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfffdc000 0x100>;
- interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
- 27 IRQ_TYPE_LEVEL_HIGH 0
- 28 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>,
+ <27 IRQ_TYPE_LEVEL_HIGH 0>,
+ <28 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
};
compatible = "bosch,m_can";
reg = <0xe0828000 0x100>, <0x100000 0x7800>;
reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>;
clock-names = "hclk", "cclk";
compatible = "bosch,m_can";
reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>;
clock-names = "hclk", "cclk";
compatible = "bosch,m_can";
reg = <0xe0830000 0x100>, <0x100000 0x10000>;
reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>;
clock-names = "hclk", "cclk";
compatible = "bosch,m_can";
reg = <0xe0834000 0x100>, <0x110000 0x4400>;
reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>;
clock-names = "hclk", "cclk";
compatible = "bosch,m_can";
reg = <0xe0838000 0x100>, <0x110000 0x8800>;
reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>;
clock-names = "hclk", "cclk";
compatible = "bosch,m_can";
reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
reg-names = "m_can", "message_ram";
- interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>;
clock-names = "hclk", "cclk";
gmac0: ethernet@e2800000 {
compatible = "microchip,sama7g5-gem";
reg = <0xe2800000 0x1000>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
gmac1: ethernet@e2804000 {
compatible = "microchip,sama7g5-emac";
reg = <0xe2804000 0x1000>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
clock-names = "pclk", "hclk";
status = "disabled";