Change getSubReg semantics. It now returns zero if the specified register doesn't...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56099 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index 6b46054..8d9b7a4 100644 (file)
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -457,7 +457,8 @@ public:
   virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
 
   /// getSubReg - Returns the physical register number of sub-register "Index"
-  /// for physical register RegNo.
+  /// for physical register RegNo. Return zero if the sub-register does not
+  /// exist.
   virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const = 0;
 
   //===--------------------------------------------------------------------===//

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 94e30ee..73f6f81 100644 (file)
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -655,12 +655,12 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
   OS << "unsigned " << ClassName 
      << "::getSubReg(unsigned RegNo, unsigned Index) const {\n"
      << "  switch (RegNo) {\n"
-     << "  default: abort(); break;\n";
+     << "  default:\n    return 0;\n";
   for (std::map<Record*, std::vector<std::pair<int, Record*> > >::iterator 
         I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) {
     OS << "  case " << getQualifiedName(I->first) << ":\n";
     OS << "    switch (Index) {\n";
-    OS << "    default: abort(); break;\n";
+    OS << "    default:\n      return 0;\n";
     for (unsigned i = 0, e = I->second.size(); i != e; ++i)
       OS << "    case " << (I->second)[i].first << ": return "
          << getQualifiedName((I->second)[i].second) << ";\n";