erase_address[erase_number] = address;
++erase_number;
}
- inline void add_write_range(unsigned start, unsigned end) {
+ inline void add_write_range(unsigned seg_start, unsigned seg_length, unsigned start, unsigned end) {
+ if (start < seg_start)
+ start = seg_start;
+ if (end > seg_start + seg_length)
+ end = seg_start + seg_length;
if (write_start > start)
write_start = start;
if (write_end < end)
logged = true;
unsigned offset = address % BSL_MSP_segment_length;
// write the whole segment
- status.add_write_range(address - offset, address - offset + BSL_MSP_segment_length);
+ status.add_write_range(d.address, d.length, address - offset, address - offset + BSL_MSP_segment_length);
// log.printf("wr s: %x, e: %x\n", status.write_start, status.write_end);
// skip to the next segment
i += BSL_MSP_segment_length - offset;
} else { // writeable
unsigned address = d.address+i;
// write word containig this byte
- status.add_write_range(address & ~1, (address & ~1)+2);
+ status.add_write_range(d.address, d.length, address & ~1, (address & ~1)+2);
// log.printf("wr s: %x, e: %x\n", status.write_start, status.write_end);
if (!logged) {
log.printf("Verify: Error @ %x, exp: %02x, got: %02x\n", address, d.data[i], buf[i]);
if (status.read_ok) {
assert(status.write_end > status.write_start);
write_length = status.write_end - status.write_start;
+ assert(status.write_start >= address);
write_index = status.write_start - address;
- if (status.write_start < address) {
- // data starts in the middle of Flash segment which was just erased
- write_index = 0;
- unsigned offset = address - status.write_start;
- write_length -= offset;
- }
}
log.printf("Write %x .. %x len: %x\n", address+write_index, address+write_index+write_length-1, write_length);
assert(write_length > 0);
ADXL_BW_RATE = 0x2C, // BW_RATE register
ADXL_LOW_POWER = 1<<4, // LOW_POWER bit
- ADXL_RATE_100 = 10<<0, // Output Data Rate = 100Hz
- ADXL_RATE_25 = 8<<0, // Output Data Rate = 25Hz
+ ADXL_RATE_3200 = 15<<0, // Output Data Rate = 3200s/sec
+ ADXL_RATE_1600 = 14<<0, // Output Data Rate = 1600s/sec
+ ADXL_RATE_800 = 13<<0, // Output Data Rate = 800s/sec
+ ADXL_RATE_400 = 12<<0, // Output Data Rate = 400s/sec
+ ADXL_RATE_200 = 11<<0, // Output Data Rate = 200s/sec
+ ADXL_RATE_100 = 10<<0, // Output Data Rate = 100s/sec
+ ADXL_RATE_50 = 9<<0, // Output Data Rate = 50s/sec
+ ADXL_RATE_25 = 8<<0, // Output Data Rate = 25s/sec
ADXL_POWER_CTL = 0x2D, // POWER_CTL register
ADXL_LINK = 1<<5, // Link bit