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drm/i915/uc: Sanitize uC when GT is sanitized
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Tue, 23 Jul 2019 09:14:04 +0000 (10:14 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 23 Jul 2019 10:38:23 +0000 (11:38 +0100)
The microcontrollers are part of GT so it makes logical sense to have
them sanitized at the same time. This also fixed an issue with our
status tracking where the FW load status is not reset around
hibernation.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190723091404.6449-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gem/i915_gem_pm.c
drivers/gpu/drm/i915/gt/intel_gt_pm.c

index 8faf262..b5561cb 100644 (file)
@@ -239,7 +239,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
        }
        spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
 
-       intel_uc_sanitize(&i915->gt.uc);
        i915_gem_sanitize(i915);
 }
 
index 61ed912..65c0d0c 100644 (file)
@@ -118,6 +118,8 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
 
        GEM_TRACE("\n");
 
+       intel_uc_sanitize(&gt->uc);
+
        if (!reset_engines(gt) && !force)
                return;