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net/mlx5: Use aligned variable while allocating ICM memory
authorErez Shitrit <erezsh@mellanox.com>
Fri, 24 Apr 2020 19:45:04 +0000 (12:45 -0700)
committerSaeed Mahameed <saeedm@mellanox.com>
Tue, 28 Apr 2020 19:45:10 +0000 (12:45 -0700)
The alignment value is part of the input structure, so use it and spare
extra memory allocation when is not needed.
Now, using the new ability when allocating icm for Direct-Rule
insertion.
Signed-off-by: Ariel Levkovich <lariel@mellanox.com>
Signed-off-by: Erez Shitrit <erezsh@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/infiniband/hw/mlx5/main.c
drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
include/linux/mlx5/driver.h

index f106752..65e0e24 100644 (file)
@@ -2444,7 +2444,7 @@ static int handle_alloc_dm_sw_icm(struct ib_ucontext *ctx,
        act_size = roundup_pow_of_two(act_size);
 
        dm->size = act_size;
-       err = mlx5_dm_sw_icm_alloc(dev, type, act_size,
+       err = mlx5_dm_sw_icm_alloc(dev, type, act_size, attr->alignment,
                                   to_mucontext(ctx)->devx_uid, &dm->dev_addr,
                                   &dm->icm_dm.obj_id);
        if (err)
index 6cbccba..3d5e57f 100644 (file)
@@ -90,7 +90,8 @@ void mlx5_dm_cleanup(struct mlx5_core_dev *dev)
 }
 
 int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
-                        u64 length, u16 uid, phys_addr_t *addr, u32 *obj_id)
+                        u64 length, u32 log_alignment, u16 uid,
+                        phys_addr_t *addr, u32 *obj_id)
 {
        u32 num_blocks = DIV_ROUND_UP_ULL(length, MLX5_SW_ICM_BLOCK_SIZE(dev));
        u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {};
@@ -99,6 +100,7 @@ int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
        unsigned long *block_map;
        u64 icm_start_addr;
        u32 log_icm_size;
+       u64 align_mask;
        u32 max_blocks;
        u64 block_idx;
        void *sw_icm;
@@ -136,11 +138,14 @@ int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
                return -EOPNOTSUPP;
 
        max_blocks = BIT(log_icm_size - MLX5_LOG_SW_ICM_BLOCK_SIZE(dev));
+
+       if (log_alignment < MLX5_LOG_SW_ICM_BLOCK_SIZE(dev))
+               log_alignment = MLX5_LOG_SW_ICM_BLOCK_SIZE(dev);
+       align_mask = BIT(log_alignment - MLX5_LOG_SW_ICM_BLOCK_SIZE(dev)) - 1;
+
        spin_lock(&dm->lock);
-       block_idx = bitmap_find_next_zero_area(block_map,
-                                              max_blocks,
-                                              0,
-                                              num_blocks, 0);
+       block_idx = bitmap_find_next_zero_area(block_map, max_blocks, 0,
+                                              num_blocks, align_mask);
 
        if (block_idx < max_blocks)
                bitmap_set(block_map,
index 30d2d73..cc33515 100644 (file)
@@ -95,13 +95,12 @@ static int dr_icm_create_dm_mkey(struct mlx5_core_dev *mdev,
 }
 
 static struct mlx5dr_icm_mr *
-dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool,
-                     enum mlx5_sw_icm_type type,
-                     size_t align_base)
+dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool)
 {
        struct mlx5_core_dev *mdev = pool->dmn->mdev;
+       enum mlx5_sw_icm_type dm_type;
        struct mlx5dr_icm_mr *icm_mr;
-       size_t align_diff;
+       size_t log_align_base;
        int err;
 
        icm_mr = kvzalloc(sizeof(*icm_mr), GFP_KERNEL);
@@ -111,14 +110,22 @@ dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool,
        icm_mr->pool = pool;
        INIT_LIST_HEAD(&icm_mr->mr_list);
 
-       icm_mr->dm.type = type;
-
-       /* 2^log_biggest_table * entry-size * double-for-alignment */
        icm_mr->dm.length = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
-                                                              pool->icm_type) * 2;
+                                                              pool->icm_type);
+
+       if (pool->icm_type == DR_ICM_TYPE_STE) {
+               dm_type = MLX5_SW_ICM_TYPE_STEERING;
+               log_align_base = ilog2(icm_mr->dm.length);
+       } else {
+               dm_type = MLX5_SW_ICM_TYPE_HEADER_MODIFY;
+               /* Align base is 64B */
+               log_align_base = ilog2(DR_ICM_MODIFY_HDR_ALIGN_BASE);
+       }
+       icm_mr->dm.type = dm_type;
 
-       err = mlx5_dm_sw_icm_alloc(mdev, icm_mr->dm.type, icm_mr->dm.length, 0,
-                                  &icm_mr->dm.addr, &icm_mr->dm.obj_id);
+       err = mlx5_dm_sw_icm_alloc(mdev, icm_mr->dm.type, icm_mr->dm.length,
+                                  log_align_base, 0, &icm_mr->dm.addr,
+                                  &icm_mr->dm.obj_id);
        if (err) {
                mlx5dr_err(pool->dmn, "Failed to allocate SW ICM memory, err (%d)\n", err);
                goto free_icm_mr;
@@ -137,15 +144,18 @@ dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool,
 
        icm_mr->icm_start_addr = icm_mr->dm.addr;
 
-       /* align_base is always a power of 2 */
-       align_diff = icm_mr->icm_start_addr & (align_base - 1);
-       if (align_diff)
-               icm_mr->used_length = align_base - align_diff;
+       if (icm_mr->icm_start_addr & (BIT(log_align_base) - 1)) {
+               mlx5dr_err(pool->dmn, "Failed to get Aligned ICM mem (asked: %zu)\n",
+                          log_align_base);
+               goto free_mkey;
+       }
 
        list_add_tail(&icm_mr->mr_list, &pool->icm_mr_list);
 
        return icm_mr;
 
+free_mkey:
+       mlx5_core_destroy_mkey(mdev, &icm_mr->mkey);
 free_dm:
        mlx5_dm_sw_icm_dealloc(mdev, icm_mr->dm.type, icm_mr->dm.length, 0,
                               icm_mr->dm.addr, icm_mr->dm.obj_id);
@@ -200,24 +210,11 @@ static int dr_icm_chunks_create(struct mlx5dr_icm_bucket *bucket)
        struct mlx5dr_icm_pool *pool = bucket->pool;
        struct mlx5dr_icm_mr *icm_mr = NULL;
        struct mlx5dr_icm_chunk *chunk;
-       enum mlx5_sw_icm_type dm_type;
-       size_t align_base;
        int i, err = 0;
 
        mr_req_size = bucket->num_of_entries * bucket->entry_size;
        mr_row_size = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
                                                         pool->icm_type);
-
-       if (pool->icm_type == DR_ICM_TYPE_STE) {
-               dm_type = MLX5_SW_ICM_TYPE_STEERING;
-               /* Align base is the biggest chunk size / row size */
-               align_base = mr_row_size;
-       } else {
-               dm_type = MLX5_SW_ICM_TYPE_HEADER_MODIFY;
-               /* Align base is 64B */
-               align_base = DR_ICM_MODIFY_HDR_ALIGN_BASE;
-       }
-
        mutex_lock(&pool->mr_mutex);
        if (!list_empty(&pool->icm_mr_list)) {
                icm_mr = list_last_entry(&pool->icm_mr_list,
@@ -228,7 +225,7 @@ static int dr_icm_chunks_create(struct mlx5dr_icm_bucket *bucket)
        }
 
        if (!icm_mr || mr_free_size < mr_row_size) {
-               icm_mr = dr_icm_pool_mr_create(pool, dm_type, align_base);
+               icm_mr = dr_icm_pool_mr_create(pool);
                if (!icm_mr) {
                        err = -ENOMEM;
                        goto out_err;
index b60e5ab..b46537a 100644 (file)
@@ -1080,7 +1080,8 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,
 struct mlx5_uars_page *mlx5_get_uars_page(struct mlx5_core_dev *mdev);
 void mlx5_put_uars_page(struct mlx5_core_dev *mdev, struct mlx5_uars_page *up);
 int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
-                        u64 length, u16 uid, phys_addr_t *addr, u32 *obj_id);
+                        u64 length, u32 log_alignment, u16 uid,
+                        phys_addr_t *addr, u32 *obj_id);
 int mlx5_dm_sw_icm_dealloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
                           u64 length, u16 uid, phys_addr_t addr, u32 obj_id);