ARM: dts: exynos: align OPP table names with DT schema

DT schema expects names of operating points tables to match certain
pattern:

  exynos5422-odroidxu3-lite.dtb: opp-table0: $nodename:0: 'opp-table0' does not match '^opp-table(-[a-z0-9]+)?$'

Link: https://lore.kernel.org/r/20230120064724.40621-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index a2d6ee7..9b25449 100644 (file)
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -780,7 +780,7 @@
                        status = "disabled";
                };
 
-               bus_dmc_opp_table: opp-table1 {
+               bus_dmc_opp_table: opp-table-1 {
                        compatible = "operating-points-v2";
 
                        opp-50000000 {
@@ -869,7 +869,7 @@
                        status = "disabled";
                };
 
-               bus_leftbus_opp_table: opp-table2 {
+               bus_leftbus_opp_table: opp-table-2 {
                        compatible = "operating-points-v2";
 
                        opp-50000000 {
@@ -894,7 +894,7 @@
                        };
                };
 
-               bus_mcuisp_opp_table: opp-table3 {
+               bus_mcuisp_opp_table: opp-table-3 {
                        compatible = "operating-points-v2";
 
                        opp-50000000 {
@@ -914,7 +914,7 @@
                        };
                };
 
-               bus_isp_opp_table: opp-table4 {
+               bus_isp_opp_table: opp-table-4 {
                        compatible = "operating-points-v2";
 
                        opp-50000000 {
@@ -934,7 +934,7 @@
                        };
                };
 
-               bus_peril_opp_table: opp-table5 {
+               bus_peril_opp_table: opp-table-5 {
                        compatible = "operating-points-v2";
 
                        opp-50000000 {

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 2c25cc3..d11cbe0 100644 (file)
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -287,7 +287,7 @@
                        status = "disabled";
                };
 
-               bus_dmc_opp_table: opp-table1 {
+               bus_dmc_opp_table: opp-table-1 {
                        compatible = "operating-points-v2";
                        opp-shared;
 
@@ -306,7 +306,7 @@
                        };
                };
 
-               bus_acp_opp_table: opp-table2 {
+               bus_acp_opp_table: opp-table-2 {
                        compatible = "operating-points-v2";
                        opp-shared;
 
@@ -321,7 +321,7 @@
                        };
                };
 
-               bus_peri_opp_table: opp-table3 {
+               bus_peri_opp_table: opp-table-3 {
                        compatible = "operating-points-v2";
                        opp-shared;
 
@@ -333,7 +333,7 @@
                        };
                };
 
-               bus_fsys_opp_table: opp-table4 {
+               bus_fsys_opp_table: opp-table-4 {
                        compatible = "operating-points-v2";
                        opp-shared;
 
@@ -345,7 +345,7 @@
                        };
                };
 
-               bus_display_opp_table: opp-table5 {
+               bus_display_opp_table: opp-table-5 {
                        compatible = "operating-points-v2";
                        opp-shared;
 
@@ -360,7 +360,7 @@
                        };
                };
 
-               bus_leftbus_opp_table: opp-table6 {
+               bus_leftbus_opp_table: opp-table-6 {
                        compatible = "operating-points-v2";
                        opp-shared;
 

diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index aa0b61b..c02865f 100644 (file)
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -93,7 +93,7 @@
                };
        };
 
-       cpu0_opp_table: opp-table0 {
+       cpu0_opp_table: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
@@ -420,7 +420,7 @@
                        status = "disabled";
                };
 
-               bus_dmc_opp_table: opp-table1 {
+               bus_dmc_opp_table: opp-table-1 {
                        compatible = "operating-points-v2";
 
                        opp-100000000 {
@@ -446,7 +446,7 @@
                        };
                };
 
-               bus_acp_opp_table: opp-table2 {
+               bus_acp_opp_table: opp-table-2 {
                        compatible = "operating-points-v2";
 
                        opp-100000000 {
@@ -515,7 +515,7 @@
                        status = "disabled";
                };
 
-               bus_leftbus_opp_table: opp-table3 {
+               bus_leftbus_opp_table: opp-table-3 {
                        compatible = "operating-points-v2";
 
                        opp-100000000 {
@@ -537,7 +537,7 @@
                        };
                };
 
-               bus_display_opp_table: opp-table4 {
+               bus_display_opp_table: opp-table-4 {
                        compatible = "operating-points-v2";
 
                        opp-160000000 {
@@ -548,7 +548,7 @@
                        };
                };
 
-               bus_fsys_opp_table: opp-table5 {
+               bus_fsys_opp_table: opp-table-5 {
                        compatible = "operating-points-v2";
 
                        opp-100000000 {
@@ -559,7 +559,7 @@
                        };
                };
 
-               bus_peri_opp_table: opp-table6 {
+               bus_peri_opp_table: opp-table-6 {
                        compatible = "operating-points-v2";
 
                        opp-50000000 {

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 4708dcd..f82f82f 100644 (file)
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -81,7 +81,7 @@
                };
        };
 
-       cpu0_opp_table: opp-table0 {
+       cpu0_opp_table: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9f2523a..12168f3 100644 (file)
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -42,7 +42,7 @@
         * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
         */
 
-       cluster_a15_opp_table: opp-table0 {
+       cluster_a15_opp_table: opp-table-0 {
                compatible = "operating-points-v2";
                opp-shared;
 
@@ -108,7 +108,7 @@
                };
        };
 
-       cluster_a7_opp_table: opp-table1 {
+       cluster_a7_opp_table: opp-table-1 {
                compatible = "operating-points-v2";
                opp-shared;
 

diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 35818c4..06103dd 100644 (file)
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -35,7 +35,7 @@
                };
        };
 
-       bus_wcore_opp_table: opp-table2 {
+       bus_wcore_opp_table: opp-table-2 {
                compatible = "operating-points-v2";
 
                /* derived from 532MHz MPLL */
@@ -61,7 +61,7 @@
                };
        };
 
-       bus_noc_opp_table: opp-table3 {
+       bus_noc_opp_table: opp-table-3 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -79,7 +79,7 @@
                };
        };
 
-       bus_fsys_apb_opp_table: opp-table4 {
+       bus_fsys_apb_opp_table: opp-table-4 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -91,7 +91,7 @@
                };
        };
 
-       bus_fsys2_opp_table: opp-table5 {
+       bus_fsys2_opp_table: opp-table-5 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -106,7 +106,7 @@
                };
        };
 
-       bus_mfc_opp_table: opp-table6 {
+       bus_mfc_opp_table: opp-table-6 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -127,7 +127,7 @@
                };
        };
 
-       bus_gen_opp_table: opp-table7 {
+       bus_gen_opp_table: opp-table-7 {
                compatible = "operating-points-v2";
 
                /* derived from 532MHz MPLL */
@@ -145,7 +145,7 @@
                };
        };
 
-       bus_peri_opp_table: opp-table8 {
+       bus_peri_opp_table: opp-table-8 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -154,7 +154,7 @@
                };
        };
 
-       bus_g2d_opp_table: opp-table9 {
+       bus_g2d_opp_table: opp-table-9 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -175,7 +175,7 @@
                };
        };
 
-       bus_g2d_acp_opp_table: opp-table10 {
+       bus_g2d_acp_opp_table: opp-table-10 {
                compatible = "operating-points-v2";
 
                /* derived from 532MHz MPLL */
@@ -193,7 +193,7 @@
                };
        };
 
-       bus_jpeg_opp_table: opp-table11 {
+       bus_jpeg_opp_table: opp-table-11 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -211,7 +211,7 @@
                };
        };
 
-       bus_jpeg_apb_opp_table: opp-table12 {
+       bus_jpeg_apb_opp_table: opp-table-12 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -229,7 +229,7 @@
                };
        };
 
-       bus_disp1_fimd_opp_table: opp-table13 {
+       bus_disp1_fimd_opp_table: opp-table-13 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -241,7 +241,7 @@
                };
        };
 
-       bus_disp1_opp_table: opp-table14 {
+       bus_disp1_opp_table: opp-table-14 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -256,7 +256,7 @@
                };
        };
 
-       bus_gscl_opp_table: opp-table15 {
+       bus_gscl_opp_table: opp-table-15 {
                compatible = "operating-points-v2";
 
                /* derived from 600MHz DPLL */
@@ -271,7 +271,7 @@
                };
        };
 
-       bus_mscl_opp_table: opp-table16 {
+       bus_mscl_opp_table: opp-table-16 {
                compatible = "operating-points-v2";
 
                /* derived from 666MHz CPLL */
@@ -292,7 +292,7 @@
                };
        };
 
-       dmc_opp_table: opp-table17 {
+       dmc_opp_table: opp-table-17 {
                compatible = "operating-points-v2";
 
                opp00 {