if (!TargetFrameLowering::isSafeForNoCSROpt(F)) {
const uint32_t *CallPreservedMask =
TRI->getCallPreservedMask(MF, F->getCallingConv());
- // Set callee saved register as preserved.
- for (unsigned i = 0; i < RegMaskSize; ++i)
- RegMask[i] = RegMask[i] | CallPreservedMask[i];
+ if (CallPreservedMask) {
+ // Set callee saved register as preserved.
+ for (unsigned i = 0; i < RegMaskSize; ++i)
+ RegMask[i] = RegMask[i] | CallPreservedMask[i];
+ }
} else {
++NumCSROpt;
DEBUG(dbgs() << MF.getName()
--- /dev/null
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -enable-ipra < %s | FileCheck -check-prefix=GCN %s
+
+; Kernels are not called, so there is no call preserved mask.
+; GCN-LABEL: {{^}}kernel:
+; GCN: flat_store_dword
+define amdgpu_kernel void @kernel(i32 addrspace(1)* %out) #0 {
+entry:
+ store i32 0, i32 addrspace(1)* %out
+ ret void
+}
+
+attributes #0 = { nounwind }