// repz repnz <insn> ; GAS errors for the use of two similar prefixes
// lock addq %rax, %rbx ; Destination operand must be of memory type
// xacquire <insn> ; xacquire must be accompanied by 'lock'
- bool isPrefix = StringSwitch<bool>(Name)
- .Cases("rex64", "data32", "data16", true)
- .Cases("xacquire", "xrelease", true)
- .Cases("acquire", "release", isParsingIntelSyntax())
- .Default(false);
+ bool IsPrefix =
+ StringSwitch<bool>(Name)
+ .Cases("cs", "ds", "es", "fs", "gs", "ss", true)
+ .Cases("rex64", "data32", "data16", "addr32", "addr16", true)
+ .Cases("xacquire", "xrelease", true)
+ .Cases("acquire", "release", isParsingIntelSyntax())
+ .Default(false);
auto isLockRepeatNtPrefix = [](StringRef N) {
return StringSwitch<bool>(N)
Name = Next;
PatchedName = Name;
ForcedDataPrefix = X86::Mode32Bit;
- isPrefix = false;
+ IsPrefix = false;
}
}
// prefix juxtaposed with an operation like "lock incl 4(%rax)", because we
// just want to parse the "lock" as the first instruction and the "incl" as
// the next one.
- if (getLexer().isNot(AsmToken::EndOfStatement) && !isPrefix) {
+ if (getLexer().isNot(AsmToken::EndOfStatement) && !IsPrefix) {
// Parse '*' modifier.
if (getLexer().is(AsmToken::Star))
Operands.push_back(X86Operand::CreateToken("*", consumeToken()));
// Consume the EndOfStatement or the prefix separator Slash
if (getLexer().is(AsmToken::EndOfStatement) ||
- (isPrefix && getLexer().is(AsmToken::Slash)))
+ (IsPrefix && getLexer().is(AsmToken::Slash)))
Parser.Lex();
else if (CurlyAsEndOfStatement)
// Add an actual EndOfStatement before the curly brace
} // SchedRW
//===----------------------------------------------------------------------===//
+// Address-size override prefixes.
+//
+
+let SchedRW = [WriteNop] in {
+def ADDR16_PREFIX : I<0x67, PrefixByte, (outs), (ins), "addr16", []>,
+ Requires<[In32BitMode]>;
+def ADDR32_PREFIX : I<0x67, PrefixByte, (outs), (ins), "addr32", []>,
+ Requires<[In64BitMode]>;
+} // SchedRW
+
+//===----------------------------------------------------------------------===//
// Moves to and from segment registers.
//
--- /dev/null
+# RUN: llvm-mc %s -triple x86_64-linux-gnu -filetype=obj -o - | llvm-objdump -d - | FileCheck %s
+
+.text
+.global foo
+foo:
+ insl
+ gs outsl
+ .code64
+ addr32 insl
+ addr32 gs outsl
+ .code32
+ addr16 insl
+ addr16 gs outsl
+ .code64
+ retq
+
+# CHECK: <foo>:
+# CHECK-NEXT: 6d insl %dx, %es:(%rdi)
+# CHECK-NEXT: 65 6f outsl %gs:(%rsi), %dx
+# CHECK-NEXT: 67 6d insl %dx, %es:(%edi)
+# CHECK-NEXT: 67 65 6f outsl %gs:(%esi), %dx
+# CHECK-NEXT: 67 6d insl %dx, %es:(%edi)
+# CHECK-NEXT: 67 65 6f outsl %gs:(%esi), %dx
--- /dev/null
+# RUN: llvm-mc %s -triple x86_64-linux-gnu -filetype=obj -o - | llvm-objdump -d - | FileCheck %s
+
+.text
+.global foo
+foo:
+ cs outsl
+ ds outsl
+ es outsw
+ fs outsw
+ gs outsl
+ ss outsl
+ retq
+
+# CHECK: <foo>:
+# CHECK-NEXT: 2e 6f outsl %cs:(%rsi), %dx
+# CHECK-NEXT: 3e 6f outsl %ds:(%rsi), %dx
+# CHECK-NEXT: 26 66 6f outsw %es:(%rsi), %dx
+# CHECK-NEXT: 64 66 6f outsw %fs:(%rsi), %dx
+# CHECK-NEXT: 65 6f outsl %gs:(%rsi), %dx
+# CHECK-NEXT: 36 6f outsl %ss:(%rsi), %dx