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gallium/radeon: set SHADER_RW_BUFFER priority for streamout buffers
authorMarek Olšák <marek.olsak@amd.com>
Thu, 11 Aug 2016 19:50:55 +0000 (21:50 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 17 Aug 2016 10:24:35 +0000 (12:24 +0200)
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeon/r600_streamout.c
src/gallium/drivers/radeonsi/si_descriptors.c

index 705eb13..b5296aa 100644 (file)
@@ -218,7 +218,7 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
                        radeon_emit(cs, va >> 8);                       /* BUFFER_BASE */
 
                        r600_emit_reloc(rctx, &rctx->gfx, r600_resource(t[i]->b.buffer),
-                                       RADEON_USAGE_WRITE, RADEON_PRIO_RINGS_STREAMOUT);
+                                       RADEON_USAGE_WRITE, RADEON_PRIO_SHADER_RW_BUFFER);
 
                        /* R7xx requires this packet after updating BUFFER_BASE.
                         * Without this, R7xx locks up. */
@@ -228,7 +228,7 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
                                radeon_emit(cs, va >> 8);
 
                                r600_emit_reloc(rctx, &rctx->gfx, r600_resource(t[i]->b.buffer),
-                                               RADEON_USAGE_WRITE, RADEON_PRIO_RINGS_STREAMOUT);
+                                               RADEON_USAGE_WRITE, RADEON_PRIO_SHADER_RW_BUFFER);
                        }
                }
 
index 1d04a9c..fcc8a32 100644 (file)
@@ -1311,7 +1311,8 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
                        radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
                                                            (struct r600_resource*)buffer,
                                                            buffers->shader_usage,
-                                                           buffers->priority, true);
+                                                           RADEON_PRIO_SHADER_RW_BUFFER,
+                                                           true);
                        buffers->enabled_mask |= 1u << bufidx;
                } else {
                        /* Clear the descriptor and unset the resource. */
@@ -1474,7 +1475,8 @@ static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource
 
                radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx,
                                                    rbuffer, buffers->shader_usage,
-                                                   buffers->priority, true);
+                                                   RADEON_PRIO_SHADER_RW_BUFFER,
+                                                   true);
 
                /* Update the streamout state. */
                if (sctx->b.streamout.begin_emitted)