drm/amd/powerplay: implement the get_enabled_mask callback for smu12

implement sensor interface of feature mask for debugfs.

Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
index ad68a56..3f1cd06 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
@@ -75,6 +75,9 @@ int smu_v12_0_fini_smc_tables(struct smu_context *smu);
 
 int smu_v12_0_populate_smc_tables(struct smu_context *smu);
 
+int smu_v12_0_get_enabled_mask(struct smu_context *smu,
+                                     uint32_t *feature_mask, uint32_t num);
+
 int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
                                          enum smu_clk_type clk_id,
                                          uint32_t *value);

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 2e1941b..4726166 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -877,6 +877,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
        .init_smc_tables = smu_v12_0_init_smc_tables,
        .fini_smc_tables = smu_v12_0_fini_smc_tables,
        .populate_smc_tables = smu_v12_0_populate_smc_tables,
+       .get_enabled_mask = smu_v12_0_get_enabled_mask,
        .get_current_clk_freq = smu_v12_0_get_current_clk_freq,
        .get_dpm_ultimate_freq = smu_v12_0_get_dpm_ultimate_freq,
        .mode2_reset = smu_v12_0_mode2_reset,

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
index 0e10cec..2ac7f2f 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
@@ -330,6 +330,35 @@ int smu_v12_0_populate_smc_tables(struct smu_context *smu)
        return smu_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
 }
 
+int smu_v12_0_get_enabled_mask(struct smu_context *smu,
+                                     uint32_t *feature_mask, uint32_t num)
+{
+       uint32_t feature_mask_high = 0, feature_mask_low = 0;
+       int ret = 0;
+
+       if (!feature_mask || num < 2)
+               return -EINVAL;
+
+       ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh);
+       if (ret)
+               return ret;
+       ret = smu_read_smc_arg(smu, &feature_mask_high);
+       if (ret)
+               return ret;
+
+       ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow);
+       if (ret)
+               return ret;
+       ret = smu_read_smc_arg(smu, &feature_mask_low);
+       if (ret)
+               return ret;
+
+       feature_mask[0] = feature_mask_low;
+       feature_mask[1] = feature_mask_high;
+
+       return ret;
+}
+
 int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
                                          enum smu_clk_type clk_id,
                                          uint32_t *value)