drm/i915: Ivybridge MI_ARB_ON_OFF context w/a

The workaround itself applies to gen7 only (according to the docs) and
as Eric Anholt points out shouldn't be required since we don't use HW
scheduling features, and therefore arbitration. Though since it is a
small, and simple addition, and we don't really understand the issue,
just do it.

FWIW, I eventually want to play with some of the arbitration stuff, and
I'd hate to forget about this.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index fb6aa5e..d49d5fc 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -324,10 +324,15 @@ mi_set_context(struct intel_ring_buffer *ring,
 {
        int ret;
 
-       ret = intel_ring_begin(ring, 4);
+       ret = intel_ring_begin(ring, 6);
        if (ret)
                return ret;
 
+       if (IS_GEN7(ring->dev))
+               intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
+       else
+               intel_ring_emit(ring, MI_NOOP);
+
        intel_ring_emit(ring, MI_NOOP);
        intel_ring_emit(ring, MI_SET_CONTEXT);
        intel_ring_emit(ring, new_context->obj->gtt_offset |
@@ -338,6 +343,11 @@ mi_set_context(struct intel_ring_buffer *ring,
        /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
        intel_ring_emit(ring, MI_NOOP);
 
+       if (IS_GEN7(ring->dev))
+               intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
+       else
+               intel_ring_emit(ring, MI_NOOP);
+
        intel_ring_advance(ring);
 
        return ret;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bee1012..14cb714 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -210,6 +210,9 @@
 #define MI_DISPLAY_FLIP                MI_INSTR(0x14, 2)
 #define MI_DISPLAY_FLIP_I915   MI_INSTR(0x14, 1)
 #define   MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
+#define MI_ARB_ON_OFF          MI_INSTR(0x08, 0)
+#define   MI_ARB_ENABLE                        (1<<0)
+#define   MI_ARB_DISABLE               (0<<0)
 #define MI_SET_CONTEXT         MI_INSTR(0x18, 0)
 #define   MI_MM_SPACE_GTT              (1<<8)
 #define   MI_MM_SPACE_PHYSICAL         (0<<8)