int n;
if (!cpu_model) {
- cpu_model = "dc232b";
+ cpu_model = XTENSA_DEFAULT_CPU_MODEL;
}
for (n = 0; n < smp_cpus; n++) {
static QEMUMachine xtensa_lx60_machine = {
.name = "lx60",
- .desc = "lx60 EVB (dc232b)",
+ .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
.init = xtensa_lx60_init,
.max_cpus = 4,
};
static QEMUMachine xtensa_lx200_machine = {
.name = "lx200",
- .desc = "lx200 EVB (dc232b)",
+ .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
.init = xtensa_lx200_init,
.max_cpus = 4,
};
const char *initrd_filename, const char *cpu_model)
{
if (!cpu_model) {
- cpu_model = "dc232b";
+ cpu_model = XTENSA_DEFAULT_CPU_MODEL;
}
sim_init(ram_size, boot_device, kernel_filename, kernel_cmdline,
initrd_filename, cpu_model);
static QEMUMachine xtensa_sim_machine = {
.name = "sim",
- .desc = "sim machine (dc232b)",
+ .desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")",
.init = xtensa_sim_init,
.max_cpus = 4,
};
#define cpu_signal_handler cpu_xtensa_signal_handler
#define cpu_list xtensa_cpu_list
+#ifdef TARGET_WORDS_BIGENDIAN
+#define XTENSA_DEFAULT_CPU_MODEL "fsf"
+#else
+#define XTENSA_DEFAULT_CPU_MODEL "dc232b"
+#endif
+
XtensaCPU *cpu_xtensa_init(const char *cpu_model);
static inline CPUXtensaState *cpu_init(const char *cpu_model)