// Last Chance Recoloring
//===----------------------------------------------------------------------===//
+/// Return true if \p reg has any tied def operand.
+static bool hasTiedDef(MachineRegisterInfo *MRI, unsigned reg) {
+ for (const MachineOperand &MO : MRI->def_operands(reg))
+ if (MO.isTied())
+ return true;
+
+ return false;
+}
+
/// mayRecolorAllInterferences - Check if the virtual registers that
/// interfere with \p VirtReg on \p PhysReg (or one of its aliases) may be
/// recolored to free \p PhysReg.
LiveInterval *Intf = Q.interferingVRegs()[i - 1];
// If Intf is done and sit on the same register class as VirtReg,
// it would not be recolorable as it is in the same state as VirtReg.
- if ((getStage(*Intf) == RS_Done &&
- MRI->getRegClass(Intf->reg) == CurRC) ||
+ // However, if VirtReg has tied defs and Intf doesn't, then
+ // there is still a point in examining if it can be recolorable.
+ if (((getStage(*Intf) == RS_Done &&
+ MRI->getRegClass(Intf->reg) == CurRC) &&
+ !(hasTiedDef(MRI, VirtReg.reg) && !hasTiedDef(MRI, Intf->reg))) ||
FixedRegisters.count(Intf->reg)) {
DEBUG(dbgs() << "Early abort: the interference is not recolorable.\n");
return false;