void notifyInstructionDispatched(const InstRef &IR,
llvm::ArrayRef<unsigned> UsedPhysRegs,
- unsigned uOps);
+ unsigned uOps) const;
void collectWrites(llvm::SmallVectorImpl<WriteRef> &Vec,
unsigned RegID) const {
void notifyInstructionIssued(
const InstRef &IR,
- llvm::ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used);
- void notifyInstructionExecuted(const InstRef &IR);
- void notifyInstructionReady(const InstRef &IR);
- void notifyResourceAvailable(const ResourceRef &RR);
+ llvm::ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used) const;
+ void notifyInstructionExecuted(const InstRef &IR) const;
+ void notifyInstructionReady(const InstRef &IR) const;
+ void notifyResourceAvailable(const ResourceRef &RR) const;
// Notify listeners that buffered resources have been consumed or freed.
- void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved);
+ void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved) const;
};
} // namespace mca
bool hasWorkToComplete() const override { return !RCU.isEmpty(); }
llvm::Error cycleStart() override;
llvm::Error execute(InstRef &IR) override;
- void notifyInstructionRetired(const InstRef &IR);
+ void notifyInstructionRetired(const InstRef &IR) const;
};
} // namespace mca
void DispatchStage::notifyInstructionDispatched(const InstRef &IR,
ArrayRef<unsigned> UsedRegs,
- unsigned UOps) {
+ unsigned UOps) const {
LLVM_DEBUG(dbgs() << "[E] Instruction Dispatched: #" << IR << '\n');
notifyEvent<HWInstructionEvent>(
HWInstructionDispatchedEvent(IR, UsedRegs, UOps));
// to the instruction.
SmallVector<unsigned, 4> RegisterFiles(PRF.getNumRegisterFiles());
for (std::unique_ptr<WriteState> &WS : IS.getDefs())
- PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), WS.get()), RegisterFiles);
+ PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), WS.get()),
+ RegisterFiles);
// Reserve slots in the RCU, and notify the instruction that it has been
// dispatched to the schedulers for execution.
unsigned DispatchedOpcodes = DispatchWidth - AvailableEntries;
CarryOver -= DispatchedOpcodes;
assert(CarriedOver.isValid() && "Invalid dispatched instruction");
-
+
SmallVector<unsigned, 8> RegisterFiles(PRF.getNumRegisterFiles(), 0U);
notifyInstructionDispatched(CarriedOver, RegisterFiles, DispatchedOpcodes);
if (!CarryOver)
return issueInstruction(IR);
}
-void ExecuteStage::notifyInstructionExecuted(const InstRef &IR) {
+void ExecuteStage::notifyInstructionExecuted(const InstRef &IR) const {
LLVM_DEBUG(dbgs() << "[E] Instruction Executed: #" << IR << '\n');
notifyEvent<HWInstructionEvent>(
HWInstructionEvent(HWInstructionEvent::Executed, IR));
}
-void ExecuteStage::notifyInstructionReady(const InstRef &IR) {
+void ExecuteStage::notifyInstructionReady(const InstRef &IR) const {
LLVM_DEBUG(dbgs() << "[E] Instruction Ready: #" << IR << '\n');
notifyEvent<HWInstructionEvent>(
HWInstructionEvent(HWInstructionEvent::Ready, IR));
}
-void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) {
+void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) const {
LLVM_DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.'
<< RR.second << "]\n");
for (HWEventListener *Listener : getListeners())
}
void ExecuteStage::notifyInstructionIssued(
- const InstRef &IR, ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used) {
+ const InstRef &IR,
+ ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used) const {
LLVM_DEBUG({
dbgs() << "[E] Instruction Issued: #" << IR << '\n';
for (const std::pair<ResourceRef, ResourceCycles> &Resource : Used) {
}
void ExecuteStage::notifyReservedOrReleasedBuffers(const InstRef &IR,
- bool Reserved) {
+ bool Reserved) const {
const InstrDesc &Desc = IR.getInstruction()->getDesc();
if (Desc.Buffers.empty())
return;
return llvm::ErrorSuccess();
}
-void RetireStage::notifyInstructionRetired(const InstRef &IR) {
+void RetireStage::notifyInstructionRetired(const InstRef &IR) const {
LLVM_DEBUG(llvm::dbgs() << "[E] Instruction Retired: #" << IR << '\n');
llvm::SmallVector<unsigned, 4> FreedRegs(PRF.getNumRegisterFiles());
const Instruction &Inst = *IR.getInstruction();