regression test created

diff --git a/tools/regression-test/Makefile b/tools/regression-test/Makefile
new file mode 100644 (file)
index 0000000..fe42518
--- /dev/null
+++ b/tools/regression-test/Makefile
@@ -0,0 +1,18 @@
+ASMSOURCES =   regression.asm\r
+\r
+OBJECTS        =       $(ASMSOURCES:.asm=.o)\r
+\r
+LIBRARIES =\r
+#-------------------------------------------------------------------------------\r
+all :  $(OBJECTS) $(LIBRARIES)\r
+       ld65 -o regression.nes --config sample1.cfg --obj $(OBJECTS)\r
+\r
+.SUFFIXES : .asm .o\r
+\r
+.asm.o :\r
+       ca65 -t none $*.asm\r
+\r
+clean :\r
+       -rm *.nes\r
+       -rm *.o\r
+\r

diff --git a/tools/regression-test/character.chr b/tools/regression-test/character.chr
new file mode 100644 (file)
index 0000000..87cdeba
Binary files /dev/null and b/tools/regression-test/character.chr differ

diff --git a/tools/regression-test/dd-img.sh b/tools/regression-test/dd-img.sh
new file mode 100755 (executable)
index 0000000..45183d3
--- /dev/null
+++ b/tools/regression-test/dd-img.sh
@@ -0,0 +1,25 @@
+#!/bin/bash 
+
+if [ "$1" == "" ] ; then
+    echo "$0 -in_filename (w/o .nex )"
+    exit -1
+fi
+
+in_name=$1
+
+in_file=$in_name.nes
+out_file1=$in_name-prg.bin
+out_file2=$in_name-chr.bin
+
+echo in_file=$in_name.nes
+echo out_file1=$in_name-prg.bin
+echo out_file2=$in_name-chr.bin
+
+echo "processing...."
+
+dd if=$in_file of=$out_file1 bs=16 skip=1 count=2048 2> /dev/null
+dd if=$in_file of=$out_file2 bs=16 skip=2049 2> /dev/null
+#4k img creation
+dd if=sample1-prg.bin of=sample1-prg-4k.bin bs=512 count=8
+
+echo "done."

diff --git a/tools/regression-test/regression.asm b/tools/regression-test/regression.asm
new file mode 100644 (file)
index 0000000..68ed6ae
--- /dev/null
+++ b/tools/regression-test/regression.asm
@@ -0,0 +1,321 @@
+.setcpu                "6502"\r
+.autoimport    on\r
+\r
+; iNES header\r
+.segment "HEADER"\r
+       .byte   $4E, $45, $53, $1A      ; "NES" Header\r
+       .byte   $02                     ; PRG-BANKS\r
+       .byte   $01                     ; CHR-BANKS\r
+       .byte   $01                     ; Vetrical Mirror\r
+       .byte   $00                     ; \r
+       .byte   $00, $00, $00, $00      ; \r
+       .byte   $00, $00, $00, $00      ; \r
+\r
+.segment "STARTUP"\r
+.proc  Reset\r
+\r
+;;; de1 env decoder bug test\r
+;;;LDA   $8182, y\r
+;;;STA   $2007\r
+;;;INY   \r
+;;;DEX   \r
+;;;;;BPL   #-10\r
+;;;LDA   $8182, y\r
+;;;STA   $2007\r
+;;;INY   \r
+;;;DEX   \r
+;;;;;BPL   #-10\r
+;;;LDA   #$3d\r
+;;;STA   $0302               ;;;>>>invalid store address!!!! @ 907,921,200 ps\r
+\r
+\r
+\r
+\r
+; interrupt off, initialize sp.\r
+       sei\r
+       ldx     #$ff\r
+       txs\r
+\r
+    ;ppu register initialize.\r
+       lda     #$00\r
+       sta     $2000\r
+       sta     $2001\r
+\r
+\r
+       lda     #$3f\r
+       sta     $2006\r
+       lda     #$00\r
+       sta     $2006\r
+\r
+    ;;load palette.\r
+       ldx     #$00\r
+       ldy     #$20\r
+copypal:\r
+       lda     palettes, x\r
+       sta     $2007\r
+       inx\r
+       dey\r
+       bne     copypal\r
+\r
+       lda     #$20\r
+       sta     $2006\r
+       lda     #$ab\r
+       sta     $2006\r
+       ldx     #$00\r
+       ldy     #$0d\r
+\r
+    ;;load name table.\r
+copymap:\r
+       lda     string, x\r
+       sta     $2007\r
+       inx\r
+       dey\r
+       bne     copymap\r
+\r
+    ;;scroll reg set.\r
+       lda     #$00\r
+       sta     $2005\r
+       sta     $2005\r
+\r
+;;;;----------------------\r
+    ;;load name tbl.\r
+    ldy #$00\r
+    ldx #$40    ;;name table entry cnt.\r
+\r
+    lda #$20\r
+    sta $2006\r
+    lda #$c0\r
+    sta $2006\r
+\r
+nt_st:\r
+    lda nt1, y\r
+    sta $2007\r
+    iny\r
+    dex\r
+    bpl nt_st\r
+\r
+    ;;load attr tbl.\r
+    ldy #$00\r
+    ldx #$08    ;;attribute entry cnt\r
+\r
+    lda #$23\r
+    sta $2006\r
+    lda #$c8\r
+    sta $2006\r
+\r
+at_st:\r
+    lda at1, y\r
+    sta $2007\r
+    iny\r
+    dex\r
+    bpl at_st\r
+\r
+    ;;set universal bg color.\r
+    lda #$3d\r
+    sta $0302\r
+    jsr set_bg_col\r
+\r
+    ;;set scroll reg.\r
+    ;;lda #$a6\r
+    lda #$05\r
+    sta $0300\r
+    lda #00\r
+    sta $0301\r
+    jsr set_scroll\r
+\r
+    ;;set next page name table\r
+    ldy #$00\r
+    ldx #$0b\r
+\r
+    lda #$24\r
+    sta $2006\r
+    lda #$c0\r
+    sta $2006\r
+\r
+nt2_st:\r
+    lda nt2, y\r
+    sta $2007\r
+    iny\r
+    dex\r
+    bpl nt2_st\r
+\r
+    ;;next page attr.\r
+    lda #$27\r
+    sta $2006\r
+    lda #$d0\r
+    sta $2006\r
+\r
+    lda #$e4\r
+    sta $2007\r
+\r
+;;;    ;;dma test data.\r
+;;;    ldy #$00\r
+;;;    ldx #$41\r
+;;;    stx $00\r
+;;;    ldx #$00\r
+;;;dma_set:\r
+;;;    ;;y pos\r
+;;;    txa\r
+;;;    sta $0200, y\r
+;;;    iny\r
+;;;    ;;tile index\r
+;;;    lda $00\r
+;;;    cmp #$5b\r
+;;;    bne inc_tile\r
+;;;    lda #$41\r
+;;;    sta $00\r
+;;;inc_tile:\r
+;;;    inc $00\r
+;;;    sta $0200, y\r
+;;;    iny\r
+;;;    ;;attribute\r
+;;;    lda #$01\r
+;;;    sta $0200, y\r
+;;;    iny\r
+;;;    ;;x pos\r
+;;;    txa\r
+;;;    adc #$03\r
+;;;    tax\r
+;;;    rol\r
+;;;    sta $0200, y\r
+;;;    iny\r
+;;;    bne dma_set\r
+;;;\r
+;;;    ;;dma start.\r
+;;;    lda #$02\r
+;;;    sta $4014\r
+\r
+    ;;show bg...\r
+       lda     #$1e\r
+       sta     $2001\r
+\r
+    ;;;enable nmi\r
+       lda     #$80\r
+       sta     $2000\r
+\r
+    ;;done...\r
+    ;;infinite loop.\r
+mainloop:\r
+\r
+    ;;read ppu status reg while displaying\r
+    ;;vram read test\r
+    ldx #$0a\r
+l1:\r
+    nop\r
+    dex\r
+    bne l1\r
+\r
+    ldx #$0a\r
+read_status:\r
+    lda $2002\r
+    dex\r
+    bne read_status\r
+\r
+       jmp     mainloop\r
+.endproc\r
+\r
+\r
+nmi_test:\r
+    jsr set_scroll\r
+    jsr set_bg_col\r
+\r
+    rti\r
+\r
+add_nl:\r
+    clc\r
+    txa\r
+    pha\r
+\r
+    lda $01\r
+    sta $2006\r
+\r
+    lda $00\r
+    adc #$20\r
+    sta $00\r
+    sta $2006\r
+\r
+    bcc no_carry\r
+    lda $01\r
+    adc #$00\r
+    sta $01\r
+    sta $2006\r
+    lda $00\r
+    sta $2006\r
+no_carry:\r
+\r
+    pla\r
+    tax\r
+    rts\r
+\r
+set_scroll:\r
+    lda $0300\r
+    sta $2005\r
+    clc\r
+    adc #$05\r
+    sta $0300\r
+    lda $0301\r
+    sta $2005\r
+    clc\r
+    adc #04\r
+;;    sta $0301\r
+    rts\r
+\r
+set_bg_col:\r
+    lda #$3f\r
+    sta $2006\r
+    lda #$10\r
+    sta $2006\r
+    lda $0302\r
+    sta $2007\r
+    cmp #$30\r
+    bne bg_dec\r
+    lda #$3d\r
+    sta $0302\r
+    jmp bg_done\r
+bg_dec:\r
+    dec $0302\r
+bg_done:\r
+    rts\r
+\r
+nt1:\r
+       .byte   $41, $42, $43, $44, $45, $46, $47, $48, $49, $4a, $4b, $4c, $4d, $4e, $4f, $50\r
+       .byte   $61, $62, $63, $64, $65, $66, $67, $68, $69, $6a, $6b, $6c, $6d, $6e, $6f, $70\r
+       .byte   $80, $81, $82, $83, $84, $85, $86, $87, $88, $89, $8a, $8b, $8c, $8d, $8e, $8f\r
+       .byte   $90, $91, $92, $93, $94, $95, $96, $97, $98, $99, $9a, $9b, $9c, $9d, $9e, $9f\r
+nt2:\r
+       .byte   $6b, $6a, $69, $68, $67, $66, $65, $64, $63, $62, $61\r
+       .byte   $30, $31, $32, $33, $34, $35, $36, $37, $38, $39, $3a\r
+\r
+at1:\r
+       .byte   $1b, $e4, $a5, $5a\r
+       .byte   $e4, $1b, $5a, $a5\r
+\r
+palettes:\r
+;;;bg palette\r
+       .byte   $0f, $00, $10, $20\r
+       .byte   $0f, $04, $14, $24\r
+       .byte   $0f, $08, $18, $28\r
+       .byte   $0f, $0c, $1c, $2c\r
+;;;spr palette\r
+       .byte   $0f, $00, $10, $20\r
+       .byte   $0f, $06, $16, $26\r
+       .byte   $0f, $08, $18, $28\r
+       .byte   $0f, $0a, $1a, $2a\r
+\r
+string:\r
+       .byte   "test2!"\r
+\r
+;;;for DE1 internal memory constraints.\r
+.segment "VECINFO_4k"\r
+       .word   nmi_test\r
+       .word   Reset\r
+       .word   $0000\r
+\r
+.segment "VECINFO"\r
+       .word   nmi_test\r
+       .word   Reset\r
+       .word   $0000\r
+\r
+; character rom file.\r
+.segment "CHARS"\r
+       .incbin "character.chr"\r

diff --git a/tools/regression-test/sample1.cfg b/tools/regression-test/sample1.cfg
new file mode 100644 (file)
index 0000000..15d836d
--- /dev/null
+++ b/tools/regression-test/sample1.cfg
@@ -0,0 +1,42 @@
+# memory map
+MEMORY {
+       HEADER:         start = $0000, size = $0010, file = %O, fill = yes;
+       ROMST:          start = $8000, size = $0ffa, type = ro, file = %O, fill = yes, define = yes;
+       ROMINFO_4k:     start = $8ffa, size = $0006, type = ro, file = %O, fill = yes, define = yes;
+       ROMST_other:    start = $9000, size = $6ffa, type = ro, file = %O, fill = yes, define = yes;
+       ROMINFO:        start = $fffa, size = $0006, type = ro, file = %O, fill = yes, define = yes;
+       ROMCHR:         start = $0000, size = $2000, type = rw, define = yes;
+       ZP:                 start = $0000, size = $0020, type = rw, define = yes;
+       RAM:            start = $0400, size = $0400, type = rw, define = yes;
+       STACK:          start = $0200, size = $0200, type = rw, define = yes;
+       SRAM:           start = $6000, size = $2000, type = rw, define = yes;
+}
+
+# segment map
+SEGMENTS {
+       HEADER:         load = HEADER,          type = ro;
+       STARTUP:        load = ROMST,           type = ro,      define = yes;
+       VECINFO_4k:     load = ROMINFO_4k,  type = ro,  define = yes;
+       VECINFO:        load = ROMINFO,         type = ro,      define = yes;
+       RODATA:         load = ROMST,           type = ro,      define = yes;
+       DATA:           load = ROMST, run = RAM,type = rw,      define = yes;
+       BSS:            load = RAM,                 type = bss, define = yes;
+       ZEROPAGE:       load = ZP,                  type = zp;
+       CODE:           load = ROMST,           type = ro,      define = yes;
+       CHARS:          load = ROMCHR,          type = ro;
+}
+
+FEATURES {
+       CONDES: segment = RODATA,
+               type = constructor,
+               label = __CONSTRUCTOR_TABLE__,
+               count = __CONSTRUCTOR_COUNT__;
+       CONDES: segment = RODATA,
+               type = destructor,
+               label = __DESTRUCTOR_TABLE__,
+               count = __DESTRUCTOR_COUNT__;
+}
+
+SYMBOLS {
+       __STACKSIZE__ = $0200;
+}