drm/amdgpu/gfx9: add gfx config for vega12

Just a place holder for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 5eb609d..5f6113e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -981,6 +981,15 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
                adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0;
                gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;
                break;
+       case CHIP_VEGA12:
+               adev->gfx.config.max_hw_contexts = 8;
+               adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
+               adev->gfx.config.sc_prim_fifo_size_backend = 0x100;
+               adev->gfx.config.sc_hiz_tile_fifo_size = 0x30;
+               adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0;
+               gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;
+               DRM_INFO("fix gfx.config for vega12\n");
+               break;
        case CHIP_RAVEN:
                adev->gfx.config.max_hw_contexts = 8;
                adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;